From: Min Kyu Jeong <minkyu.jeong@arm.com>
Date: Mon, 15 Nov 2010 20:04:04 +0000 (-0600)
Subject: O3: prevent a squash when completeAcc() modifies misc reg through TC.
X-Git-Tag: stable_2012_02_02~737
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=745df74fe0ee57444487c7a231ce02a96244e48d;p=gem5.git

O3: prevent a squash when completeAcc() modifies misc reg through TC.

This happens on ARM instructions when they update the IT state bits.
Code and associated comment was copied from execute() and initiateAcc() methods
---

diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 6f7c23b2f..268746655 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -113,8 +113,17 @@ template <class Impl>
 Fault
 BaseO3DynInst<Impl>::completeAcc(PacketPtr pkt)
 {
+    // @todo: Pretty convoluted way to avoid squashing from happening
+    // when using the TC during an instruction's execution
+    // (specifically for instructions that have side-effects that use
+    // the TC).  Fix this.
+    bool in_syscall = this->thread->inSyscall;
+    this->thread->inSyscall = true;
+
     this->fault = this->staticInst->completeAcc(pkt, this, this->traceData);
 
+    this->thread->inSyscall = in_syscall;
+
     return this->fault;
 }