From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Date: Tue, 31 Jul 2018 09:48:37 +0000 (+0100)
Subject: intel: tools: aubwrite: reuse canonical address helper
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7471286bb092be24e4ad2555f9355075dfefe8b6;p=mesa.git

intel: tools: aubwrite: reuse canonical address helper

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
---

diff --git a/src/intel/tools/aub_write.h b/src/intel/tools/aub_write.h
index 2e42e3d4009..b421679b9eb 100644
--- a/src/intel/tools/aub_write.h
+++ b/src/intel/tools/aub_write.h
@@ -29,6 +29,7 @@
 #include <stdio.h>
 
 #include "dev/gen_device_info.h"
+#include "common/gen_gem.h"
 
 struct aub_ppgtt_table {
    uint64_t phys_addr;
@@ -63,23 +64,7 @@ static inline void
 aub_write_reloc(const struct gen_device_info *devinfo, void *p, uint64_t v)
 {
    if (devinfo->gen >= 8) {
-      /* From the Broadwell PRM Vol. 2a,
-       * MI_LOAD_REGISTER_MEM::MemoryAddress:
-       *
-       *   "This field specifies the address of the memory
-       *   location where the register value specified in the
-       *   DWord above will read from.  The address specifies
-       *   the DWord location of the data. Range =
-       *   GraphicsVirtualAddress[63:2] for a DWord register
-       *   GraphicsAddress [63:48] are ignored by the HW and
-       *   assumed to be in correct canonical form [63:48] ==
-       *   [47]."
-       *
-       * In practice, this will always mean the top bits are zero
-       * because of the GTT size limitation of the aubdump tool.
-       */
-      const int shift = 63 - 47;
-      *(uint64_t *)p = (((int64_t)v) << shift) >> shift;
+      *(uint64_t *)p = gen_canonical_address(v);
    } else {
       *(uint32_t *)p = v;
    }