From: lkcl <lkcl@web>
Date: Mon, 14 Mar 2022 06:40:25 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3063
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=747e30442f4b83a538c30f563931eb074db101da;p=libreriscv.git

---

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index f69773276..fdece8ae9 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -349,7 +349,9 @@ This only requires 2 instructions (grevlut, bext).
 Note that if the mask is required to be placed
 directly into CR Fields (for use as CR Predicate
 masks rather than a integer mask) then sv.ori
-may be used instead:
+may be used instead, bearing in mind that sv.ori
+is a 64-bit instruction, and `VL` must have been
+set to the required length:
 
     sv.ori./elwid=8 r10.v, r10.v, 0