From: Claire Wolf <claire@symbioticeda.com>
Date: Wed, 29 Apr 2020 12:28:54 +0000 (+0200)
Subject: Add tests based on the test case from #1990
X-Git-Tag: working-ls180~565^2~4
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=749c2ff84a618cdb1d0c38fefde9445ece42e6fb;p=yosys.git

Add tests based on the test case from #1990

Signed-off-by: Claire Wolf <claire@symbioticeda.com>
---

diff --git a/tests/simple/partsel.v b/tests/simple/partsel.v
index 83493fcb0..dd66ded55 100644
--- a/tests/simple/partsel.v
+++ b/tests/simple/partsel.v
@@ -64,3 +64,49 @@ endmodule
 module partsel_test003(input [2:0] a, b, input [31:0] din, output [3:0] dout);
 assign dout = din[a*b +: 2];
 endmodule
+
+module partsel_test004 (
+	input [31:0] din,
+	input signed [4:0] n,
+	output reg [31:0] dout
+);
+	always @(*) begin
+		dout = 0;
+		dout[n+1 +: 2] = din[n +: 2];
+	end
+endmodule
+
+
+module partsel_test005 (
+	input [31:0] din,
+	input signed [4:0] n,
+	output reg [31:0] dout
+);
+	always @(*) begin
+		dout = 0;
+		dout[n+1] = din[n];
+	end
+endmodule
+
+module partsel_test006 (
+	input [31:0] din,
+	input signed [4:0] n,
+	output reg [31:-32] dout
+);
+	always @(*) begin
+		dout = 0;
+		dout[n+1 +: 2] = din[n +: 2];
+	end
+endmodule
+
+
+module partsel_test007 (
+	input [31:0] din,
+	input signed [4:0] n,
+	output reg [31:-32] dout
+);
+	always @(*) begin
+		dout = 0;
+		dout[n+1] = din[n];
+	end
+endmodule