From: Jacob Lifshay Date: Tue, 7 Dec 2021 03:00:28 +0000 (-0800) Subject: fix broken url X-Git-Tag: sv_maxu_works-initial~660 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=74adc2b94a4409162119157f3f75e05a06e4c841;p=openpower-isa.git fix broken url --- diff --git a/src/openpower/decoder/power_regspec_map.py b/src/openpower/decoder/power_regspec_map.py index 7c066d7d..151cb7ee 100644 --- a/src/openpower/decoder/power_regspec_map.py +++ b/src/openpower/decoder/power_regspec_map.py @@ -32,7 +32,7 @@ is set, then carried into read_fast2 in PowerDecode2). The SPR regfile on the other hand is *binary*-encoded, and, furthermore, has to be "remapped" to internal SPR Enum indices (see SPRMap in PowerDecode2) -see https://libre-so:.org/3d_gpu/architecture/regfile/ section on regspecs +see https://libre-soc.org/3d_gpu/architecture/regfile/ section on regspecs """ from nmigen import Const, Signal from openpower.consts import XERRegsEnum, FastRegsEnum, StateRegsEnum