From: Steve Reinhardt <steve.reinhardt@amd.com>
Date: Thu, 12 Mar 2009 06:05:26 +0000 (-0700)
Subject: cache: set dirty bit on swaps (oops!)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=758bfe4eb57e5b7aada4c974830532ec067a5bda;p=gem5.git

cache: set dirty bit on swaps (oops!)
---

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index 618e00569..a78fd3637 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -149,8 +149,10 @@ Cache<TagStore>::cmpAndSwap(BlkType *blk, PacketPtr pkt)
             panic("Invalid size for conditional read/write\n");
     }
 
-    if (overwrite_mem)
+    if (overwrite_mem) {
         std::memcpy(blk_data, &overwrite_val, pkt->getSize());
+        blk->status |= BlkDirty;
+    }
 }