From: lkcl <lkcl@web>
Date: Fri, 19 May 2023 18:47:27 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=758d1589181703f2c77d7a8dc144a52b06ed3a58;p=libreriscv.git

---

diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn
index 7eb0328e2..76c58b63b 100644
--- a/openpower/sv/remap.mdwn
+++ b/openpower/sv/remap.mdwn
@@ -76,6 +76,7 @@ There are five types of REMAP:
   has several key Computer Science uses. Again Prefix Sum is 100%
   Deterministic.
 
+
 Best implemented on top of a Multi-Issue Out-of-Order Micro-architecture,
 REMAP Schedules are 100% Deterministic **including Indexing** and are
 designed to be incorporated in between the Decode and Issue phases,
@@ -90,6 +91,10 @@ Architectural State is permitted to assume that the Indices
 are cacheable from the point at which the `svindex` instruction
 is executed.
 
+Further details on the Deterministic Precise-Interruptible algorithms
+used in these Schedules is found in the [[sv/remap/appendix]].
+
+
 ## Horizontal-Parallelism Hint
 
 `SVSTATE.hphint` is an indicator to hardware of how many elements are 100%
@@ -110,13 +115,6 @@ data corruption is guaranteed.
 Thus the key message is that setting `hphint` requires in-depth knowledge
 of the REMAP Algorithm Schedules, given in the Appendix.
 
-## REMAP types
-
-This section summarises the motivation for each REMAP Schedule
-and briefly goes over their characteristics and limitations.
-Further details on the Deterministic Precise-Interruptible algorithms
-used in these Schedules is found in the [[sv/remap/appendix]].
-
 ## Determining Register Hazards
 
 For high-performance (Multi-Issue, Out-of-Order) systems it is critical