From: Richard Henderson Date: Thu, 27 Jul 2000 00:12:52 +0000 (-0700) Subject: ia64.md (movqicc_astep, [...]): New. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=75cdbeb8b6e67e5fecd9daab6c748d927a3b7ccf;p=gcc.git ia64.md (movqicc_astep, [...]): New. * config/ia64/ia64.md (movqicc_astep, movqi_internal_astep): New. (movhicc_astep, movhi_internal_astep): New. (movsicc_astep, movsi_internal_astep): New. (movdicc_astep, movdi_internal_astep): New. (movsfcc_astep, movsf_internal_astep): New. (movdfcc_astep, movdf_internal_astep): New. (movxfcc_astep, movxf_internal_astep): New. (cmovdi_internal_astep, cmovsi_internal_astep): New. Unify the cmov[ds]i splitters. From-SVN: r35274 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f4348c6dabf..6b36e5771f0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2000-07-27 Richard Henderson + + * config/ia64/ia64.md (movqicc_astep, movqi_internal_astep): New. + (movhicc_astep, movhi_internal_astep): New. + (movsicc_astep, movsi_internal_astep): New. + (movdicc_astep, movdi_internal_astep): New. + (movsfcc_astep, movsf_internal_astep): New. + (movdfcc_astep, movdf_internal_astep): New. + (movxfcc_astep, movxf_internal_astep): New. + (cmovdi_internal_astep, cmovsi_internal_astep): New. + Unify the cmov[ds]i splitters. + 2000-07-27 Rodney Brown * real.c (asctoeg): Rename `error' label to unexpected_char_error diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 857e2bb21db..d5e8b5e7ed3 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -176,10 +176,49 @@ operands[1] = force_reg (QImode, operands[1]); }") +;; Errata 72 implies that we cannot use predicated loads and stores +;; on affected systems. Reuse TARGET_A_STEP for convenience. + +;; ??? It would be convenient at this point if the cond_exec pattern +;; expander understood non-constant conditions on attributes. Failing +;; that we have to replicate patterns. + +(define_insn "*movqicc_astep" + [(cond_exec + (match_operator 2 "predicate_operator" + [(match_operand:CC 3 "register_operand" "c,c,c,c,c") + (const_int 0)]) + (set (match_operand:QI 0 "register_operand" "=r,r, r,*f,*f") + (match_operand:QI 1 "nonmemory_operand" "rO,J,*f,rO,*f")))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + (%J2) mov %0 = %r1 + (%J2) addl %0 = %1, r0 + (%J2) getf.sig %0 = %1 + (%J2) setf.sig %0 = %r1 + (%J2) mov %0 = %1" + [(set_attr "type" "A,A,M,M,F") + (set_attr "predicable" "no")]) + +(define_insn "*movqi_internal_astep" + [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,*f") + (match_operand:QI 1 "move_operand" "rO,J,m,rO,*f,rO,*f"))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + mov %0 = %r1 + addl %0 = %1, r0 + ld1%O1 %0 = %1%P1 + st1%Q0 %0 = %r1%P0 + getf.sig %0 = %1 + setf.sig %0 = %r1 + mov %0 = %1" + [(set_attr "type" "A,A,M,M,M,M,F") + (set_attr "predicable" "no")]) + (define_insn "*movqi_internal" [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,*f") (match_operand:QI 1 "move_operand" "rO,J,m,rO,*f,rO,*f"))] - "ia64_move_ok (operands[0], operands[1])" + "! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" "@ mov %0 = %r1 addl %0 = %1, r0 @@ -201,10 +240,43 @@ operands[1] = force_reg (HImode, operands[1]); }") +;; Errata 72 workaround. +(define_insn "*movhicc_astep" + [(cond_exec + (match_operator 2 "predicate_operator" + [(match_operand:CC 3 "register_operand" "c,c,c,c,c") + (const_int 0)]) + (set (match_operand:HI 0 "register_operand" "=r,r, r,*f,*f") + (match_operand:HI 1 "nonmemory_operand" "rO,J,*f,rO,*f")))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + (%J2) mov %0 = %r1 + (%J2) addl %0 = %1, r0 + (%J2) getf.sig %0 = %1 + (%J2) setf.sig %0 = %r1 + (%J2) mov %0 = %1" + [(set_attr "type" "A,A,M,M,F") + (set_attr "predicable" "no")]) + +(define_insn "*movhi_internal_astep" + [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,*f") + (match_operand:HI 1 "move_operand" "rO,J,m,rO,*f,rO,*f"))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + mov %0 = %r1 + addl %0 = %1, r0 + ld2%O1 %0 = %1%P1 + st2%Q0 %0 = %r1%P0 + getf.sig %0 = %1 + setf.sig %0 = %r1 + mov %0 = %1" + [(set_attr "type" "A,A,M,M,M,M,F") + (set_attr "predicable" "no")]) + (define_insn "*movhi_internal" [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,*f") (match_operand:HI 1 "move_operand" "rO,J,m,rO,*f,rO,*f"))] - "ia64_move_ok (operands[0], operands[1])" + "! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" "@ mov %0 = %r1 addl %0 = %1, r0 @@ -226,10 +298,45 @@ operands[1] = force_reg (SImode, operands[1]); }") +;; Errata 72 workaround. +(define_insn "*movsicc_astep" + [(cond_exec + (match_operator 2 "predicate_operator" + [(match_operand:CC 3 "register_operand" "c,c,c,c,c,c") + (const_int 0)]) + (set (match_operand:SI 0 "register_operand" "=r,r,r, r,*f,*f") + (match_operand:SI 1 "nonmemory_operand" "rO,J,i,*f,rO,*f")))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + (%J2) mov %0 = %r1 + (%J2) addl %0 = %1, r0 + (%J2) movl %0 = %1 + (%J2) getf.sig %0 = %1 + (%J2) setf.sig %0 = %r1 + (%J2) mov %0 = %1" + [(set_attr "type" "A,A,L,M,M,F") + (set_attr "predicable" "no")]) + +(define_insn "*movsi_internal_astep" + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r, m, r,*f,*f") + (match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f"))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + mov %0 = %r1 + addl %0 = %1, r0 + movl %0 = %1 + ld4%O1 %0 = %1%P1 + st4%Q0 %0 = %r1%P0 + getf.sig %0 = %1 + setf.sig %0 = %r1 + mov %0 = %1" + [(set_attr "type" "A,A,L,M,M,M,M,F") + (set_attr "predicable" "no")]) + (define_insn "*movsi_internal" [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,r, m, r,*f,*f") (match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f"))] - "ia64_move_ok (operands[0], operands[1])" + "! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" "@ mov %0 = %r1 addl %0 = %1, r0 @@ -257,10 +364,82 @@ operands[1] = force_reg (DImode, operands[1]); }") +;; Errata 72 workaround. +(define_insn "" + [(cond_exec + (match_operator 2 "predicate_operator" + [(match_operand:CC 3 "register_operand" "c,c,c,c,c,c,c,c") + (const_int 0)]) + (set (match_operand:DI 0 "register_operand" "=r,r,r, r,*f,*f, r,*b") + (match_operand:DI 1 "nonmemory_operand" "rO,J,i,*f,rO,*f,*b,rO")))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "* +{ + static const char * const alt[] = { + \"(%J2) mov %0 = %r1\", + \"(%J2) addl %0 = %1, r0\", + \"(%J2) movl %0 = %1\", + \"(%J2) getf.sig %0 = %1\", + \"(%J2) setf.sig %0 = %r1\", + \"(%J2) mov %0 = %1\", + \"(%J2) mov %0 = %1\", + \"(%J2) mov %0 = %r1\" + }; + + /* We use 'i' for alternative 2 despite possible PIC problems. + + If we define LEGITIMATE_CONSTANT_P such that symbols are not + allowed, then the compiler dumps the data into constant memory + instead of letting us read the values from the GOT. Similarly + if we use 'n' instead of 'i'. + + Instead, we allow such insns through reload and then split them + afterward (even without optimization). Therefore, we should + never get so far with a symbolic operand. */ + + if (which_alternative == 2 && ! TARGET_NO_PIC + && symbolic_operand (operands[1], VOIDmode)) + abort (); + + return alt[which_alternative]; +}" + [(set_attr "type" "A,A,L,M,M,F,I,I") + (set_attr "predicable" "no")]) + +(define_insn "*movdi_internal_astep" + [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,r, m,r,*f,*f,*f,Q, r,*b") + (match_operand:DI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,Q,*f,*b,rO"))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "* +{ + static const char * const alt[] = { + \"mov %0 = %r1\", + \"addl %0 = %1, r0\", + \"movl %0 = %1\", + \"ld8%O1 %0 = %1%P1\", + \"st8%Q0 %0 = %r1%P0\", + \"getf.sig %0 = %1\", + \"setf.sig %0 = %r1\", + \"mov %0 = %1\", + \"ldf8 %0 = %1%P1\", + \"stf8 %0 = %1%P0\", + \"mov %0 = %1\", + \"mov %0 = %r1\" + }; + + if (which_alternative == 2 && ! TARGET_NO_PIC + && symbolic_operand (operands[1], VOIDmode)) + abort (); + + return alt[which_alternative]; +}" + [(set_attr "type" "A,A,L,M,M,M,M,F,M,M,I,I") + (set_attr "predicable" "no")]) + (define_insn "*movdi_internal" [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r,r, m,r,*f,*f,*f,Q, r,*b") (match_operand:DI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,Q,*f,*b,rO"))] - "ia64_move_ok (operands[0], operands[1])" + "! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" "* { static const char * const alt[] = { @@ -278,17 +457,6 @@ \"%,mov %0 = %r1\" }; - /* We use 'i' for alternative 2 despite possible PIC problems. - - If we define LEGITIMATE_CONSTANT_P such that symbols are not - allowed, then the compiler dumps the data into constant memory - instead of letting us read the values from the GOT. Similarly - if we use 'n' instead of 'i'. - - Instead, we allow such insns through reload and then split them - afterward (even without optimization). Therefore, we should - never get so far with a symbolic operand. */ - if (which_alternative == 2 && ! TARGET_NO_PIC && symbolic_operand (operands[1], VOIDmode)) abort (); @@ -387,10 +555,43 @@ operands[1] = force_reg (SFmode, operands[1]); }") +;; Errata 72 workaround. +(define_insn "*movsfcc_astep" + [(cond_exec + (match_operator 2 "predicate_operator" + [(match_operand:CC 3 "register_operand" "c,c,c,c") + (const_int 0)]) + (set (match_operand:SF 0 "register_operand" "=f,*r, f,*r") + (match_operand:SF 1 "nonmemory_operand" "fG,fG,*r,*r")))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + mov %0 = %F1 + getf.s %0 = %F1 + setf.s %0 = %1 + mov %0 = %1" + [(set_attr "type" "F,M,M,A") + (set_attr "predicable" "no")]) + +(define_insn "*movsf_internal_astep" + [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f, Q,*r, f,*r,*r, m") + (match_operand:SF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r"))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + mov %0 = %F1 + ldfs %0 = %1%P1 + stfs %0 = %F1%P0 + getf.s %0 = %F1 + setf.s %0 = %1 + mov %0 = %1 + ld4%O1 %0 = %1%P1 + st4%Q0 %0 = %1%P0" + [(set_attr "type" "F,M,M,M,M,A,M,M") + (set_attr "predicable" "no")]) + (define_insn "*movsf_internal" [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f, Q,*r, f,*r,*r, m") (match_operand:SF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r"))] - "ia64_move_ok (operands[0], operands[1])" + "! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" "@ mov %0 = %F1 ldfs %0 = %1%P1 @@ -413,10 +614,43 @@ operands[1] = force_reg (DFmode, operands[1]); }") +;; Errata 72 workaround. +(define_insn "*movdfcc_astep" + [(cond_exec + (match_operator 2 "predicate_operator" + [(match_operand:CC 3 "register_operand" "c,c,c,c") + (const_int 0)]) + (set (match_operand:DF 0 "register_operand" "=f,*r, f,*r") + (match_operand:DF 1 "nonmemory_operand" "fG,fG,*r,*r")))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + mov %0 = %F1 + getf.d %0 = %F1 + setf.d %0 = %1 + mov %0 = %1" + [(set_attr "type" "F,M,M,A") + (set_attr "predicable" "no")]) + +(define_insn "*movdf_internal_astep" + [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f, Q,*r, f,*r,*r, m") + (match_operand:DF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r"))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + mov %0 = %F1 + ldfd %0 = %1%P1 + stfd %0 = %F1%P0 + getf.d %0 = %F1 + setf.d %0 = %1 + mov %0 = %1 + ld8%O1 %0 = %1%P1 + st8%Q0 %0 = %1%P0" + [(set_attr "type" "F,M,M,M,M,A,M,M") + (set_attr "predicable" "no")]) + (define_insn "*movdf_internal" [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f, Q,*r, f,*r,*r, m") (match_operand:DF 1 "general_operand" "fG,Q,fG,fG,*r,*r, m,*r"))] - "ia64_move_ok (operands[0], operands[1])" + "! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" "@ mov %0 = %F1 ldfd %0 = %1%P1 @@ -440,16 +674,40 @@ }") ;; ??? There's no easy way to mind volatile acquire/release semantics. + +;; Errata 72 workaround. +(define_insn "*movxfcc_astep" + [(cond_exec + (match_operator 2 "predicate_operator" + [(match_operand:CC 3 "register_operand" "c") + (const_int 0)]) + (set (match_operand:XF 0 "register_operand" "=f") + (match_operand:XF 1 "nonmemory_operand" "fG")))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "mov %0 = %F1" + [(set_attr "type" "F") + (set_attr "predicable" "no")]) + +(define_insn "*movxf_internal_astep" + [(set (match_operand:XF 0 "nonimmediate_operand" "=f,f, m") + (match_operand:XF 1 "general_operand" "fG,m,fG"))] + "TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" + "@ + mov %0 = %F1 + ldfe %0 = %1%P1 + stfe %0 = %F1%P0" + [(set_attr "type" "F,M,M") + (set_attr "predicable" "no")]) + (define_insn "*movxf_internal" [(set (match_operand:XF 0 "nonimmediate_operand" "=f,f, m") (match_operand:XF 1 "general_operand" "fG,m,fG"))] - "ia64_move_ok (operands[0], operands[1])" + "! TARGET_A_STEP && ia64_move_ok (operands[0], operands[1])" "@ mov %0 = %F1 ldfe %0 = %1%P1 stfe %0 = %F1%P0" [(set_attr "type" "F,M,M")]) - ;; :::::::::::::::::::: ;; :: @@ -2441,7 +2699,24 @@ ;; DImode if_then_else patterns. ;; -(define_insn_and_split "*cmovdi_internal" +;; Errata 72 workaround. +(define_insn "*cmovdi_internal_astep" + [(set (match_operand:DI 0 "nonimmediate_operand" + "=r,*f,Q,*b,r,*f,Q,*b,r,*f,Q,*b") + (if_then_else:DI + (match_operator:CC 4 "predicate_operator" + [(match_operand:CC 1 "register_operand" + "c,c,c,c,c,c,c,c,c,c,c,c") + (const_int 0)]) + (match_operand:DI 2 "general_operand" + "0,0,0,0,ri*f*b,rO,*f,r,ri*f*b,rO,*f,r") + (match_operand:DI 3 "general_operand" + "ri*f*b,rO,*f,r,0,0,0,0,ri*f*b,rO,*f,r")))] + "TARGET_A_STEP" + "* abort ();" + [(set_attr "predicable" "no")]) + +(define_insn "*cmovdi_internal" [(set (match_operand:DI 0 "nonimmediate_operand" "=r,m,*f,Q,*b,r,m,*f,Q,*b,r,m,*f,Q,*b") (if_then_else:DI @@ -2453,8 +2728,18 @@ "0,0,0,0,0,rim*f*b,rO,rOQ,*f,r,rim*f*b,rO,rOQ,*f,r") (match_operand:DI 3 "general_operand" "rim*f*b,rO,rOQ,*f,r,0,0,0,0,0,rim*f*b,rO,rOQ,*f,r")))] - "" - "#" + "! TARGET_A_STEP" + "* abort ();" + [(set_attr "predicable" "no")]) + +(define_split + [(set (match_operand 0 "nonimmediate_operand" "") + (if_then_else + (match_operator:CC 4 "predicate_operator" + [(match_operand:CC 1 "register_operand" "") + (const_int 0)]) + (match_operand 2 "general_operand" "") + (match_operand 3 "general_operand" "")))] "reload_completed" [(const_int 0)] " @@ -2476,8 +2761,7 @@ emit_insn (tmp); } DONE; -}" - [(set_attr "predicable" "no")]) +}") ;; Absolute value pattern. @@ -2534,7 +2818,21 @@ ;; SImode if_then_else patterns. ;; -(define_insn_and_split "*cmovsi_internal" +(define_insn "*cmovsi_internal_astep" + [(set (match_operand:SI 0 "nonimmediate_operand" "=r,*f,r,*f,r,*f") + (if_then_else:SI + (match_operator:CC 4 "predicate_operator" + [(match_operand:CC 1 "register_operand" "c,c,c,c,c,c") + (const_int 0)]) + (match_operand:SI 2 "general_operand" + "0,0,ri*f,rO,ri*f,rO") + (match_operand:SI 3 "general_operand" + "ri*f,rO,0,0,ri*f,rO")))] + "TARGET_A_STEP" + "* abort ();" + [(set_attr "predicable" "no")]) + +(define_insn "*cmovsi_internal" [(set (match_operand:SI 0 "nonimmediate_operand" "=r,m,*f,r,m,*f,r,m,*f") (if_then_else:SI (match_operator:CC 4 "predicate_operator" @@ -2544,30 +2842,8 @@ "0,0,0,rim*f,rO,rO,rim*f,rO,rO") (match_operand:SI 3 "general_operand" "rim*f,rO,rO,0,0,0,rim*f,rO,rO")))] - "" - "#" - "reload_completed" - [(const_int 0)] - " -{ - rtx tmp; - if (! rtx_equal_p (operands[0], operands[2])) - { - tmp = gen_rtx_SET (VOIDmode, operands[0], operands[2]); - tmp = gen_rtx_COND_EXEC (VOIDmode, operands[4], tmp); - emit_insn (tmp); - } - if (! rtx_equal_p (operands[0], operands[3])) - { - tmp = gen_rtx_fmt_ee (GET_CODE (operands[4]) == NE ? EQ : NE, - CCmode, operands[1], const0_rtx); - tmp = gen_rtx_COND_EXEC (VOIDmode, tmp, - gen_rtx_SET (VOIDmode, operands[0], - operands[3])); - emit_insn (tmp); - } - DONE; -}" + "! TARGET_A_STEP" + "* abort ();" [(set_attr "predicable" "no")]) (define_insn "*abssi2_internal"