From: Andreas Sandberg Date: Thu, 21 Jan 2021 16:44:16 +0000 (+0000) Subject: arch-arm, dev-arm: Remove Python 2 compatibility code X-Git-Tag: develop-gem5-snapshot~261 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=75e7f18e80351e12e1b828b6e077f3ec1d5ace1b;p=gem5.git arch-arm, dev-arm: Remove Python 2 compatibility code Remove uses of six and imports from __future__ and use native Python 3 functionality instead. Change-Id: Ifeb925c0b802f8186dd148e382aefe1c32fc8176 Signed-off-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39580 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py index 7ab4b6ec4..f7d9cd546 100644 --- a/src/arch/arm/ArmSystem.py +++ b/src/arch/arm/ArmSystem.py @@ -108,7 +108,7 @@ class ArmSystem(System): # root instead of appended. def generateMemNode(mem_range): - node = FdtNode("memory@%x" % long(mem_range.start)) + node = FdtNode("memory@%x" % int(mem_range.start)) node.append(FdtPropertyStrings("device_type", ["memory"])) node.append(FdtPropertyWords("reg", state.addrCells(mem_range.start) + diff --git a/src/dev/Device.py b/src/dev/Device.py index af495042f..46e992c3c 100644 --- a/src/dev/Device.py +++ b/src/dev/Device.py @@ -51,7 +51,7 @@ class PioDevice(ClockedObject): def generateBasicPioDeviceNode(self, state, name, pio_addr, size, interrupts = None): - node = FdtNode("%s@%x" % (name, long(pio_addr))) + node = FdtNode("%s@%x" % (name, int(pio_addr))) node.append(FdtPropertyWords("reg", state.addrCells(pio_addr) + state.sizeCells(size) )) diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 8fa0edde1..81d1f0755 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -211,7 +211,7 @@ class RealViewCtrl(BasicPioDevice): idreg = Param.UInt32(0x00000000, "ID Register, SYS_ID") def generateDeviceTree(self, state): - node = FdtNode("sysreg@%x" % long(self.pio_addr)) + node = FdtNode("sysreg@%x" % int(self.pio_addr)) node.appendCompatible("arm,vexpress-sysreg") node.append(FdtPropertyWords("reg", state.addrCells(self.pio_addr) + @@ -250,7 +250,7 @@ class RealViewOsc(ClockDomain): def generateDeviceTree(self, state): phandle = state.phandle(self) - node = FdtNode("osc@" + format(long(phandle), 'x')) + node = FdtNode("osc@" + format(int(phandle), 'x')) node.appendCompatible("arm,vexpress-osc") node.append(FdtPropertyWords("arm,vexpress-sysreg,func", [0x1, int(self.device)])) @@ -595,7 +595,7 @@ class MmioSRAM(ParentMem): super(MmioSRAM, self).__init__(**kwargs) def generateDeviceTree(self, state): - node = FdtNode("sram@%x" % long(self.range.start)) + node = FdtNode("sram@%x" % int(self.range.start)) node.appendCompatible(["mmio-sram"]) node.append(FdtPropertyWords("reg", state.addrCells(self.range.start) + diff --git a/src/dev/arm/SMMUv3.py b/src/dev/arm/SMMUv3.py index f444d644c..85c10ad39 100644 --- a/src/dev/arm/SMMUv3.py +++ b/src/dev/arm/SMMUv3.py @@ -187,7 +187,7 @@ class SMMUv3(ClockedObject): def generateDeviceTree(self, state): reg_addr = self.reg_map.start reg_size = self.reg_map.size() - node = FdtNode("smmuv3@%x" % long(reg_addr)) + node = FdtNode("smmuv3@%x" % int(reg_addr)) node.appendCompatible("arm,smmu-v3") node.append(FdtPropertyWords("reg", state.addrCells(reg_addr) + diff --git a/src/dev/arm/css/MHU.py b/src/dev/arm/css/MHU.py index 878ca221c..f5bb7e5bb 100644 --- a/src/dev/arm/css/MHU.py +++ b/src/dev/arm/css/MHU.py @@ -89,7 +89,7 @@ class MHU(BasicPioDevice): scp = Param.Scp(Parent.any, "System Control Processor") def generateDeviceTree(self, state): - node = FdtNode("mailbox@%x" % long(self.pio_addr)) + node = FdtNode("mailbox@%x" % int(self.pio_addr)) node.appendCompatible(["arm,mhu", "arm,primecell"]) node.append(FdtPropertyWords("reg", state.addrCells(self.pio_addr) +