From: Miodrag Milanović <mmicko@gmail.com>
Date: Mon, 4 Apr 2022 07:56:56 +0000 (+0200)
Subject: Merge pull request #3265 from YosysHQ/micko/sim_improvements
X-Git-Tag: yosys-0.16~4
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=75f484768946e50f02baba1d813e82f980e2c86f;p=yosys.git

Merge pull request #3265 from YosysHQ/micko/sim_improvements

Improve sim by setting proper past D and AD signals
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75f484768946e50f02baba1d813e82f980e2c86f