From: Richard Sandiford <richard.sandiford@linaro.org>
Date: Thu, 31 Aug 2017 10:11:41 +0000 (+0000)
Subject: [AArch64] Tighten address register subreg checks
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=76160199989decf5437de4def4d628b04d5ad68a;p=gcc.git

[AArch64] Tighten address register subreg checks

Previously we allowed subregs of non-GPR modes to be base and index
registers in non-strict mode.  In practice such subregs will always
require a reload, so we get better code by disallowing them.

2017-08-31  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_base_register_rtx_p): Only allow
	subregs whose inner modes can be stored in GPRs.
	(aarch64_classify_index): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r251557
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8d724510a45..dfde0b01185 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2017-08-31  Richard Sandiford  <richard.sandiford@linaro.org>
+	    Alan Hayward  <alan.hayward@arm.com>
+	    David Sherwood  <david.sherwood@arm.com>
+
+	* config/aarch64/aarch64.c (aarch64_base_register_rtx_p): Only allow
+	subregs whose inner modes can be stored in GPRs.
+	(aarch64_classify_index): Likewise.
+
 2017-08-31  Richard Sandiford  <richard.sandiford@linaro.org>
 	    Alan Hayward  <alan.hayward@arm.com>
 	    David Sherwood  <david.sherwood@arm.com>
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index aede22ceaf5..ca0775272af 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -4196,7 +4196,9 @@ aarch64_regno_ok_for_base_p (int regno, bool strict_p)
 static bool
 aarch64_base_register_rtx_p (rtx x, bool strict_p)
 {
-  if (!strict_p && GET_CODE (x) == SUBREG)
+  if (!strict_p
+      && GET_CODE (x) == SUBREG
+      && contains_reg_of_mode[GENERAL_REGS][GET_MODE (SUBREG_REG (x))])
     x = SUBREG_REG (x);
 
   return (REG_P (x) && aarch64_regno_ok_for_base_p (REGNO (x), strict_p));
@@ -4343,7 +4345,9 @@ aarch64_classify_index (struct aarch64_address_info *info, rtx x,
   else
     return false;
 
-  if (GET_CODE (index) == SUBREG)
+  if (!strict_p
+      && GET_CODE (index) == SUBREG
+      && contains_reg_of_mode[GENERAL_REGS][GET_MODE (SUBREG_REG (index))])
     index = SUBREG_REG (index);
 
   if ((shift == 0 ||