From: Robert Jordens <jordens@gmail.com>
Date: Mon, 24 Mar 2014 15:32:26 +0000 (-0600)
Subject: test/support: fix default ncycles
X-Git-Tag: 24jan2021_ls180~2099^2~374
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7649028bdc6a14f71dc7f4d172ddf38ca538cebe;p=litex.git

test/support: fix default ncycles
---

diff --git a/migen/test/support.py b/migen/test/support.py
index 394cc424..51a89707 100644
--- a/migen/test/support.py
+++ b/migen/test/support.py
@@ -17,6 +17,6 @@ class SimCase:
 	def test_to_verilog(self):
 		verilog.convert(self.tb)
 
-	def run_with(self, cb, ncycles=-1):
+	def run_with(self, cb, ncycles=None):
 		self.tb.callback = cb
 		run_simulation(self.tb, ncycles=ncycles)