From: lkcl <lkcl@web>
Date: Tue, 20 Sep 2022 17:57:31 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~347
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=765292c39fd8b94600f8b139b9d6f49dd420a9a3;p=libreriscv.git

---

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 84a02e459..7bc2d0a6a 100644
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -104,8 +104,16 @@ Higher performance systems may deploy SIMD backends, multi-issue and
 out-of-order execution, although it is strongly recommended to add
 predication capability directly into SIMD backend units.
 
-In Power ISA v3.0B pseudo-code form, an ADD operation, assuming both
-source and destination have been "tagged" as Vectors, is simply:
+A typical Cray-style Scalable Vector ISA (where a SIMD one has a fixed
+non-negotiable static parameter instead of a runtime-dynamic VL)
+performs its arithmetic as:
+
+    for i = 0 to VL-1:
+         VPR(RT)[i] = VPR[RA][i] + VPR(RB)[i]
+
+In Power ISA v3.0B pseudo-code form, an ADD operation in Simple-V,
+assuming both source and destination have been "tagged" as Vectors,
+is simply:
 
     for i = 0 to VL-1:
          GPR(RT+i) = GPR(RA+i) + GPR(RB+i)