From: Samuel Pitoiset Date: Thu, 11 Jun 2020 15:14:27 +0000 (+0200) Subject: radv: adjust CB_SHADER_MASK for dual-source blending in the shader info pass X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=76ee45d3a88dc1d85a8fb50620fb99032726cbec;p=mesa.git radv: adjust CB_SHADER_MASK for dual-source blending in the shader info pass Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 2816712bb2e..cb15fa35031 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2340,6 +2340,7 @@ radv_generate_graphics_pipeline_key(struct radv_pipeline *pipeline, } key.col_format = blend->spi_shader_col_format; + key.is_dual_src = blend->mrt0_is_dual_src; if (pipeline->device->physical_device->rad_info.chip_class < GFX8) radv_pipeline_compute_get_int_clamp(pCreateInfo, &key.is_int8, &key.is_int10); @@ -2462,6 +2463,7 @@ radv_fill_shader_keys(struct radv_device *device, keys[MESA_SHADER_FRAGMENT].fs.is_int10 = key->is_int10; keys[MESA_SHADER_FRAGMENT].fs.log2_ps_iter_samples = key->log2_ps_iter_samples; keys[MESA_SHADER_FRAGMENT].fs.num_samples = key->num_samples; + keys[MESA_SHADER_FRAGMENT].fs.is_dual_src = key->is_dual_src; if (nir[MESA_SHADER_COMPUTE]) { keys[MESA_SHADER_COMPUTE].cs.subgroup_size = key->compute_subgroup_size; @@ -5128,9 +5130,6 @@ radv_pipeline_init(struct radv_pipeline *pipeline, } blend.cb_shader_mask = ps->info.ps.cb_shader_mask; - if (blend.mrt0_is_dual_src) { - blend.cb_shader_mask |= (blend.cb_shader_mask & 0xf) << 4; - } if (extra && (extra->custom_blend_mode == V_028808_CB_ELIMINATE_FAST_CLEAR || diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 17d83eaaaa8..52790aea23c 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -404,6 +404,7 @@ struct radv_pipeline_key { uint32_t is_int10; uint8_t log2_ps_iter_samples; uint8_t num_samples; + bool is_dual_src; uint32_t has_multiview_view_index : 1; uint32_t optimisations_disabled : 1; uint8_t topology; @@ -1688,6 +1689,7 @@ struct radv_pipeline { /* Used for rbplus */ uint32_t col_format; uint32_t cb_target_mask; + bool is_dual_src; } graphics; }; diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 7e1659add0e..21dd5188e1a 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -106,6 +106,7 @@ struct radv_fs_variant_key { uint8_t num_samples; uint32_t is_int8; uint32_t is_int10; + bool is_dual_src; }; struct radv_cs_variant_key { diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index d8cb194d059..eca46c81157 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -857,5 +857,9 @@ radv_nir_shader_info_pass(const struct nir_shader *nir, info->ps.cb_shader_mask |= 0xf << (i * 4); } } + + if (key->fs.is_dual_src) { + info->ps.cb_shader_mask |= (info->ps.cb_shader_mask & 0xf) << 4; + } } }