From: H.J. Lu <hongjiu.lu@intel.com>
Date: Fri, 25 May 2007 12:27:27 +0000 (+0000)
Subject: sse.md (*vec_extractv2di_1_sse2): Correct shift.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=77315816df628ed27788142071b54e0f31752313;p=gcc.git

sse.md (*vec_extractv2di_1_sse2): Correct shift.

2007-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/sse.md (*vec_extractv2di_1_sse2): Correct shift.

From-SVN: r125061
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bebad9ae1d4..e5c7b30ffb4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2007-05-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/i386/sse.md (*vec_extractv2di_1_sse2): Correct shift.
+
 2007-05-25  Richard Sandiford  <richard@codesourcery.com>
 
 	* config/arm/arm-protos.h (arm_encode_call_attribute): Delete.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 661f5bb5c8d..d635b597938 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4490,7 +4490,7 @@
   "TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
    movhps\t{%1, %0|%0, %1}
-   psrldq\t{$4, %0|%0, 4}
+   psrldq\t{$8, %0|%0, 8}
    movq\t{%H1, %0|%0, %H1}"
   [(set_attr "type" "ssemov,sseishft,ssemov")
    (set_attr "mode" "V2SF,TI,TI")])