From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Wed, 26 Apr 2023 11:31:56 +0000 (+0300)
Subject: power_insn: deprecate PR specifier
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=776dfde5f27e8c5c2aff6e5fc9881b064a536bc6;p=openpower-isa.git

power_insn: deprecate PR specifier
---

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index f33f306c..b3c111b5 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -2606,13 +2606,6 @@ class SpecifierFF(SpecifierFFPR):
         return super().match(desc=desc, record=record, mode="ff")
 
 
-@_dataclasses.dataclass(eq=True, frozen=True)
-class SpecifierPR(SpecifierFFPR):
-    @classmethod
-    def match(cls, desc, record):
-        return super().match(desc=desc, record=record, mode="pr")
-
-
 @_dataclasses.dataclass(eq=True, frozen=True)
 class SpecifierMask(SpecifierPredicate):
     @classmethod
@@ -2776,8 +2769,6 @@ class SpecifierSZ(SpecifierXZ):
             if self.record.svp64.mode is not _SVMode.CROP:
                 if isinstance(spec, SpecifierFF):
                     raise ValueError("source-zero not allowed in ff mode")
-                elif isinstance(spec, SpecifierPR):
-                    raise ValueError("source-zero not allowed in pr mode")
 
 
 @_dataclasses.dataclass(eq=True, frozen=True)
@@ -2790,10 +2781,9 @@ class SpecifierDZ(SpecifierXZ):
     def validate(self, others):
         for spec in others:
             if ((self.record.svp64.mode is not _SVMode.CROP) and
-                    isinstance(spec, (SpecifierFF, SpecifierPR)) and
+                    isinstance(spec, SpecifierFF) and
                     (spec.pred.mode is _SVP64PredMode.RC1)):
-                mode = "ff" if isinstance(spec, SpecifierFF) else "pr"
-                raise ValueError(f"dest-zero not allowed in {mode} mode BO")
+                raise ValueError(f"dest-zero not allowed in ff mode BO")
 
 
 @_dataclasses.dataclass(eq=True, frozen=True)
@@ -3160,7 +3150,6 @@ class Specifiers(tuple):
         SpecifierDW,
         SpecifierSubVL,
         SpecifierFF,
-        SpecifierPR,
         SpecifierM,
         SpecifierSM,
         SpecifierDM,