From: lkcl <lkcl@web>
Date: Sat, 1 Apr 2023 19:53:31 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls012_v1~191
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=77c10b4cafdb7a071c87eda3dbf3fff319daa3d5;p=libreriscv.git

---

diff --git a/openpower/sv/rfc/ls010.mdwn b/openpower/sv/rfc/ls010.mdwn
index d0c808437..f89d18f59 100644
--- a/openpower/sv/rfc/ls010.mdwn
+++ b/openpower/sv/rfc/ls010.mdwn
@@ -244,7 +244,7 @@ the numerically-lowest element at the **MSB** end of the register.
     void get_VSR_element(el_reg_t* el, int gpr, int elt, int width) {
         check_num_elements(elt, width);
         switch (width) {
-            case 64: el->dwords[p] = VSR_regfile[gpr].dwords[1-elt];
+            case 64: el->dwords[0] = VSR_regfile[gpr].dwords[1-elt];
             case 32: el->words[0] = VSR_regfile[gpr].words[3-elt];
             case 16: el->hwords[0] = VSR_regfile[gpr].hwords[7-elt];
             case 8 : el->bytes[0] = VSR_regfile[gpr].bytes[15-elt];