From: R Veera Kumar <vklr@vkten.in>
Date: Mon, 28 Mar 2022 10:45:00 +0000 (+0530)
Subject: Changed CH02-44.png to asic_iopad_gen.svg image
X-Git-Tag: opf_rfc_ls005_v1~2973
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=77d4eec3b3f6ba634dcf62780e4329ea02ac9b2d;p=libreriscv.git

Changed CH02-44.png to asic_iopad_gen.svg image
---

diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn
index 17429715e..0ad09eb5e 100644
--- a/docs/pinmux.mdwn
+++ b/docs/pinmux.mdwn
@@ -18,7 +18,7 @@ out-enable) to be routed right the way from the ASIC, all
 the way to the IO PAD, where only then does a wire bond connect
 it to a single external pin.
 
-[[!img CH02-44.gif]]
+[[!img asic_iopad_gen.svg]]
 
 Designing an ASIC, there is no guarantee that the IO pad is
 working when manufactured. Worse, the peripheral could be