From: Chris Ballance <chris.ballance@physics.ox.ac.uk>
Date: Fri, 12 Jan 2018 18:23:08 +0000 (+0100)
Subject: bios/sdram: make read leveling robust for KUS SDRAM
X-Git-Tag: 24jan2021_ls180~1763
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=782711e5a9d5d6c8f9988ec8fe8a38f1b5bf4176;p=litex.git

bios/sdram: make read leveling robust for KUS SDRAM

Increases the initial delay step into the valid read window as
with the original delay I was not getting out of the noisy
transition window, as evidenced by seeing read delay windows
of only 8 LSB ~10% of the time, leading to failing memory
tests
---

diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c
index d9e3023d..5b1ebd70 100644
--- a/litex/soc/software/bios/sdram.c
+++ b/litex/soc/software/bios/sdram.c
@@ -383,7 +383,7 @@ static void read_delays(void)
 
 		/* Get a bit further into the working zone */
 #ifdef KUSDDRPHY
-		for(j=0;j<8;j++) {
+		for(j=0;j<16;j++) {
 			delay += 1;
 			ddrphy_rdly_dq_inc_write(1);
 		}