From: Tim Newsome <tim@sifive.com>
Date: Sat, 23 Apr 2016 17:40:23 +0000 (-0700)
Subject: Make sure to translate Debug RAM addresses also.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=78332ffbafeae5e9079bfc69ff136c5d24644a4c;p=riscv-isa-sim.git

Make sure to translate Debug RAM addresses also.
---

diff --git a/riscv/decode.h b/riscv/decode.h
index bf6a84c..9b9df5b 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -237,9 +237,12 @@ private:
 #define DCSR_CAUSE_STEPPED      4
 #define DCSR_CAUSE_HALT         5
 
+#define DEBUG_START             0xfffffffffffff000
 #define DEBUG_RAM_START         0xfffffffffffffc00       // TODO: 0x400
 #define DEBUG_RAM_END           (DEBUG_RAM_START + 64)
 #define DEBUG_ROM_START         0xfffffffffffff800       // TODO: 0x800
 #define DEBUG_ROM_END           (DEBUG_ROM_START + debug_rom_raw_len)
+#define DEBUG_END               0xffffffffffffffff
+#define DEBUG_SIZE              (DEBUG_END - DEBUG_START + 1)
 
 #endif
diff --git a/riscv/sim.cc b/riscv/sim.cc
index 5cf2646..7c50425 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -42,10 +42,11 @@ sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted,
             (unsigned long)memsz, (unsigned long)memsz0);
 
   /* Copy Debug ROM into the end of the allocated block, because we surely
-   * didn't succeed in allocation 0xfffffffff800 bytes. */
+   * didn't succeed in allocating 0xfffffffff800 bytes. */
   /* TODO: Once everything uses the new memory map, just put this at the
    * address that it actually belongs at. */
-  memcpy(mem + memsz - debug_rom_raw_len, debug_rom_raw, debug_rom_raw_len);
+  memcpy(mem + memsz - DEBUG_SIZE + DEBUG_ROM_START - DEBUG_START,
+          debug_rom_raw, debug_rom_raw_len);
 
   debug_mmu = new mmu_t(this, NULL);