From: Matthew Poremba Date: Wed, 12 Feb 2020 22:07:43 +0000 (-0800) Subject: arch-arm: Add used attribute to pauth_helpers asserts X-Git-Tag: v20.0.0.0~477 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=789eb0fb8f947b3a35a55b9229c9c9280625fbad;p=gem5.git arch-arm: Add used attribute to pauth_helpers asserts Adding M5_VAR_USED attribute to variables in pauth_helpers so that gem5.fast builds. Change-Id: I45dd70ea2e921f7ce68ea52147abdd40da99f37e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25364 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- diff --git a/src/arch/arm/pauth_helpers.cc b/src/arch/arm/pauth_helpers.cc index 892a414d6..1c83d77b8 100644 --- a/src/arch/arm/pauth_helpers.cc +++ b/src/arch/arm/pauth_helpers.cc @@ -113,9 +113,8 @@ ArmISA::calculateBottomPACBit(ThreadContext* tc, ExceptionLevel el, Fault ArmISA::trapPACUse(ThreadContext *tc, ExceptionLevel target_el) { - ExceptionLevel curr_el = currEL(tc); assert(ArmSystem::haveEL(tc, target_el) && - target_el != EL0 && (target_el >= curr_el)); + target_el != EL0 && (target_el >= currEL(tc))); switch (target_el) { case EL2: @@ -149,7 +148,7 @@ ArmISA::addPAC (ThreadContext* tc, ExceptionLevel el, uint64_t ptr, if (upperAndLowerRange(tc, el)) { ExceptionLevel s1_el = s1TranslationRegime(tc, el); assert (s1_el == EL1 || s1_el == EL2); - if (s1TranslationRegime(tc, el) == EL1) { + if (s1_el == EL1) { // EL1 translation regime registers TCR tcr = tc->readMiscReg(MISCREG_TCR_EL1); if (data) {