From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 5 Mar 2007 16:09:09 +0000 (+0000)
Subject: Stub implementation for x86.
X-Git-Tag: m5_2.0_beta3~150
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=78e5406f1958e0a25b832aab6e3c2842641d595f;p=gem5.git

Stub implementation for x86.

--HG--
extra : convert_revision : 3eccbf699bb62139a06a9b249e56bd205bc316ed
---

diff --git a/src/arch/x86/mmaped_ipr.hh b/src/arch/x86/mmaped_ipr.hh
index f2a447851..a33a3f4f0 100644
--- a/src/arch/x86/mmaped_ipr.hh
+++ b/src/arch/x86/mmaped_ipr.hh
@@ -58,10 +58,33 @@
 #ifndef __ARCH_X86_MMAPEDIPR_HH__
 #define __ARCH_X86_MMAPEDIPR_HH__
 
-#error X86 is not yet supported!
+/**
+ * @file
+ *
+ * ISA-specific helper functions for memory mapped IPR accesses.
+ */
+
+#include "config/full_system.hh"
+#include "cpu/thread_context.hh"
+#include "mem/packet.hh"
 
 namespace X86ISA
 {
+    inline Tick
+    handleIprRead(ThreadContext *xc, Packet *pkt)
+    {
+#if !FULL_SYSTEM
+        panic("Shouldn't have a memory mapped register in SE\n");
+#endif
+    }
+
+    inline Tick
+    handleIprWrite(ThreadContext *xc, Packet *pkt)
+    {
+#if !FULL_SYSTEM
+        panic("Shouldn't have a memory mapped register in SE\n");
+#endif
+    }
 };
 
 #endif // __ARCH_X86_MMAPEDIPR_HH__