From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 17 Jan 2020 23:41:55 +0000 (-0800)
Subject: synth_ice40: call wreduce before mul2dsp
X-Git-Tag: working-ls180~863^2~5
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=78ffd5d193a72a024204cae09ff4ab05238ed311;p=yosys.git

synth_ice40: call wreduce before mul2dsp
---

diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index 121bcff1f..d92e40726 100644
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -273,7 +273,8 @@ struct SynthIce40Pass : public ScriptPass
 			run("opt_expr");
 			run("opt_clean");
 			if (help_mode || dsp) {
-				run("memory_dff");
+				run("memory_dff"); // ice40_dsp will merge registers, reserve memory port registers first
+				run("wreduce t:$mul");
 				run("techmap -map +/mul2dsp.v -map +/ice40/dsp_map.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 "
 						"-D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 "
 						"-D DSP_NAME=$__MUL16X16", "(if -dsp)");