From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 24 Mar 2023 10:43:27 +0000 (+0000)
Subject: whoops added "CRB-Form" format not "CRB"
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=79731990f408c5184aedfdc21eaa450f3491f7e6;p=openpower-isa.git

whoops added "CRB-Form" format not "CRB"
---

diff --git a/openpower/isatables/fields.text b/openpower/isatables/fields.text
index 786af508..d5400d85 100644
--- a/openpower/isatables/fields.text
+++ b/openpower/isatables/fields.text
@@ -624,7 +624,7 @@
     msk (9:10,14:15)
         Field used by crternlogi and crbinlut to select which bits
         of CR Field BF are to be modified. Requires BF to be Read-Modify-Write
-        Formats: CRB-Form
+        Formats: CRB
     MB (21:25)
         Field used in M-form instructions to specify the first
         1-bit of a 64-bit mask, as described in
@@ -920,7 +920,7 @@
     TLI (21:25,19:20,31)
         Field used by the crternlogi instruction as the
         look-up table.
-        Formats: CRB-Form
+        Formats: CRB
     TO (6:10)
          Field used to specify the conditions on which to
          trap.     The    encoding     is    described   in
diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index b7f02783..506b2dc7 100644
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -167,6 +167,7 @@ class Form(Enum):
     VA2 = 39
     SVC = 40
     SVR = 41
+    CRB = 42 # crternlogi / crbinlut
 
 # Simple-V svp64 fields https://libre-soc.org/openpower/sv/svp64/