From: Michael Nolan <mtnolan2640@gmail.com>
Date: Tue, 19 May 2020 15:20:04 +0000 (-0400)
Subject: Add ca32 to caller.py
X-Git-Tag: div_pipeline~1079
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=79bd45be78fdc791a6407aece2ed62401dec6ef9;p=soc.git

Add ca32 to caller.py
---

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index 85bd96bc..57e78252 100644
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -253,6 +253,14 @@ class ISACaller:
             cy = False
         self.spr['XER'][XER_bits['CA']] = cy
 
+
+        # 32 bit carry
+        gts = [(x[32:64] > output[32:64]) == SelectableInt(1, 1)
+               for x in inputs]
+        cy32 = 1 if any(gts) else 0
+        self.spr['XER'][XER_bits['CA32']] = cy32
+
+
     def handle_comparison(self, outputs):
         out = outputs[0]
         out = exts(out.value, out.bits)