From: lkcl <lkcl@web>
Date: Tue, 14 Jun 2022 00:45:36 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1799
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=79bd768f068f03a66298c3bbfb22fc9d3ecea8e1;p=libreriscv.git

---

diff --git a/openpower/sv/mv.swizzle.mdwn b/openpower/sv/mv.swizzle.mdwn
index 53e615ee4..b1cf79955 100644
--- a/openpower/sv/mv.swizzle.mdwn
+++ b/openpower/sv/mv.swizzle.mdwn
@@ -152,7 +152,7 @@ Swizzle are entirely optional in hardware at the Embedded Level.*
 Implementors must consider Swizzle instructions to be atomically indivisible,
 even if implemented as Micro-coded.  The rest of SVP64 permits element-level
 operations to be Precise-Interrupted: *Swizzle moves do not* because
-the multiple moves are part of the same insteuction.  All XYZW
+the multiple moves are, strictly speaking, one instruction.  All XYZW
 elements *must* be completed in full before any Trap or Interrupt is
 permitted
 to be serviced. Out-of-Order Micro-architectures may of course cancel