From: lkcl <lkcl@web>
Date: Sun, 3 Oct 2021 00:17:15 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3744
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=79f15f5a19b0abf337dd5c1cea302bc4dc86e645;p=libreriscv.git

---

diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn
index b2d4dc98a..862a986a5 100644
--- a/3d_gpu/architecture/dynamic_simd.mdwn
+++ b/3d_gpu/architecture/dynamic_simd.mdwn
@@ -35,11 +35,11 @@ overrides.
 The second set of changes is targetted at Type 2 dsl.Module,
 to complete the 98% abstraction from Type 1 to a 100% level
 
-* To add a new parameter to Module's constructor,
+* To add a new parameter to `dsl.Module`'s constructor,
   `_astType`, which is the AST class type
   to be used for "casting" of m.If and m.Elif condition tests,
-  and for m.Switch values
-* To replace the two (2) calls to `Value.cast()` in Module
+  and for m.Switch's value.
+* To replace the two (2) calls to `Value.cast()` in `dsl.Module`
   with `self._astType.cast()`
 
 No further modifications beyond that are strictly necessary.