From: Jordan Justen Date: Thu, 24 Mar 2016 07:29:50 +0000 (-0700) Subject: genxml: Add L3 Cache Control register definitions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7a03fb9ccb3f8a94ec697bc6ebed8c5f859c8b8e;p=mesa.git genxml: Add L3 Cache Control register definitions Based on intel_reg.h (5912da45a69923afa1b7f2eb5bb371d848813c41) Signed-off-by: Jordan Justen --- diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml index 268ca3d97d7..960df5eaf9f 100644 --- a/src/intel/genxml/gen7.xml +++ b/src/intel/genxml/gen7.xml @@ -2508,4 +2508,31 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml index 94bb64e595e..26c1f9ecdf6 100644 --- a/src/intel/genxml/gen75.xml +++ b/src/intel/genxml/gen75.xml @@ -2906,4 +2906,30 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml index 96eda703453..694e691e5ea 100644 --- a/src/intel/genxml/gen8.xml +++ b/src/intel/genxml/gen8.xml @@ -3163,4 +3163,12 @@ + + + + + + + + diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml index 79d3006d24b..bc2639a7878 100644 --- a/src/intel/genxml/gen9.xml +++ b/src/intel/genxml/gen9.xml @@ -3467,4 +3467,12 @@ + + + + + + + +