From: Giacomo Travaglini <giacomo.travaglini@arm.com>
Date: Tue, 20 Aug 2019 13:25:40 +0000 (+0100)
Subject: dev-arm: Allow 32-bit access to GITS_TYPER
X-Git-Tag: v19.0.0.0~584
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7a1f018ce77e5c1b56c241d4899aa454fc168366;p=gem5.git

dev-arm: Allow 32-bit access to GITS_TYPER

Change-Id: I9d19174b38ba70f82050102f955ccc162965d1fb
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20618
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
---

diff --git a/src/dev/arm/gic_v3_its.cc b/src/dev/arm/gic_v3_its.cc
index 4108cc744..ca363f409 100644
--- a/src/dev/arm/gic_v3_its.cc
+++ b/src/dev/arm/gic_v3_its.cc
@@ -836,6 +836,10 @@ Gicv3Its::read(PacketPtr pkt)
         value = gitsTyper;
         break;
 
+      case GITS_TYPER + 4:
+        value = gitsTyper.high;
+        break;
+
       case GITS_CBASER:
         value = gitsCbaser;
         break;
diff --git a/src/dev/arm/gic_v3_its.hh b/src/dev/arm/gic_v3_its.hh
index 40d95c8b8..b9c1d8582 100644
--- a/src/dev/arm/gic_v3_its.hh
+++ b/src/dev/arm/gic_v3_its.hh
@@ -196,6 +196,8 @@ class Gicv3Its : public BasicPioDevice
     EndBitUnion(BASER)
 
     BitUnion64(TYPER)
+        Bitfield<63, 32> high;
+        Bitfield<31, 0> low;
         Bitfield<37> vmovp;
         Bitfield<36> cil;
         Bitfield<35, 32> cidBits;