From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 1 Apr 2021 22:14:58 +0000 (+0100)
Subject: TWI enabled in JTAG boundary scan
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7a214e3553fbb10726b58eaea432c8bd366c3677;p=soc.git

TWI enabled in JTAG boundary scan
---

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index a615b03d..8d9bec5e 100644
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -172,7 +172,7 @@ class TestIssuerInternal(Elaboratable):
             # XXX MUST keep this up-to-date with litex, and
             # soc-cocotb-sim, and err.. all needs sorting out, argh
             subset = ['uart',
-                      # 'mtwi',  - disabled for now
+                      'mtwi',
                       'eint', 'gpio', 'mspi0',
                       # 'mspi1', - disabled for now
                       # 'pwm', 'sd0', - disabled for now