From: Jacob Lifshay Date: Wed, 10 May 2023 02:16:37 +0000 (-0700) Subject: add self.FPSCR X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7a34ff20acf34834c7878fecff574d844ba8a538;p=openpower-isa.git add self.FPSCR --- diff --git a/src/openpower/decoder/helpers.py b/src/openpower/decoder/helpers.py index 9211e5ab..2d030a69 100644 --- a/src/openpower/decoder/helpers.py +++ b/src/openpower/decoder/helpers.py @@ -8,6 +8,7 @@ from operator import floordiv, mod from openpower.decoder.selectable_int import selectltu as ltu from openpower.decoder.selectable_int import selectgtu as gtu from openpower.decoder.selectable_int import check_extsign +from openpower.fpscr import FPSCRState from openpower.util import log import math @@ -847,6 +848,13 @@ class ISACallerHelper: def XLEN(self): return self.__XLEN + @property + def FPSCR(self): + # fallback for when not used through ISACaller + # needed for tests that use DOUBLE2SINGLE without using ISACaller + self.__dict__["FPSCR"] = retval = FPSCRState() + return retval + def EXTZXL(self, value, bits=None): if bits is None: bits = self.XLEN diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index a8f01ab4..b5fc8bc8 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -1270,6 +1270,10 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop): def XLEN(self): return self.namespace["XLEN"] + @property + def FPSCR(self): + return self.fpscr + def call_trap(self, trap_addr, trap_bit): """calls TRAP and sets up NIA to the new execution location. next instruction will begin at trap_addr.