From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 14 Apr 2019 16:50:12 +0000 (+0100)
Subject: clarify output, use Cat on list
X-Git-Tag: div_pipeline~2243
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7a5e5b69011d7045aeae75232a06f0ff4a13ff17;p=soc.git

clarify output, use Cat on list
---

diff --git a/TLB/src/ariane/tlb.py b/TLB/src/ariane/tlb.py
index 40f84bc0..fdeb71ae 100644
--- a/TLB/src/ariane/tlb.py
+++ b/TLB/src/ariane/tlb.py
@@ -22,7 +22,7 @@ from nmigen.lib.coding import Encoder
 
 from ptw import TLBUpdate, PTE, ASID_WIDTH
 
-TLB_ENTRIES = 4
+TLB_ENTRIES = 8
 
 
 class TLBEntry:
@@ -216,7 +216,7 @@ class PLRU:
         # the corresponding bit of the entry's index, this is
         # the next entry to replace.
         for i in range(TLB_ENTRIES):
-            en = Signal(LOG_TLB, reset_less=True)
+            en = []
             for lvl in range(LOG_TLB):
                 idx_base = (1<<lvl)-1
                 # lvl0 <=> MSB, lvl1 <=> MSB-1, ...
@@ -226,11 +226,11 @@ class PLRU:
                 m.d.comb += plru.eq(plru_tree[idx_base + (i>>shift)])
                 # en &= plru_tree_q[idx_base + (i>>shift)] == new_idx;
                 if new_idx:
-                    m.d.comb += en[lvl].eq(~plru) # yes inverted (using bool())
+                    en.append(~plru) # yes inverted (using bool())
                 else:
-                    m.d.comb += en[lvl].eq(plru)  # yes inverted (using bool())
+                    en.append(plru)  # yes inverted (using bool())
             print ("plru", i, en)
-            # boolean logic manipluation:
+            # boolean logic manipulation:
             # plur0 & plru1 & plur2 == ~(~plru0 | ~plru1 | ~plru2)
             m.d.comb += self.replace_en_o[i].eq(~Cat(*en).bool())