From: Luke Kenneth Casson Leighton Date: Wed, 18 Mar 2020 16:06:30 +0000 (+0000) Subject: comment reverse-order of bit-fields X-Git-Tag: div_pipeline~1685 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7ad69408bc64f4737ea26480b1ca458bea65c894;p=soc.git comment reverse-order of bit-fields --- diff --git a/src/soc/decoder/power_fieldsn.py b/src/soc/decoder/power_fieldsn.py index a5e03a11..8a12e40d 100644 --- a/src/soc/decoder/power_fieldsn.py +++ b/src/soc/decoder/power_fieldsn.py @@ -32,11 +32,11 @@ class SignalBitRange(BitRange): for t in range(start, stop, step): k = OrderedDict.__getitem__(self, t) print ("t", t, k) - res.append(self.signal[width-k-1]) + res.append(self.signal[width-k-1]) # reverse-order here return Cat(*res) else: k = OrderedDict.__getitem__(self, subs) - return self.signal[width-k-1] + return self.signal[width-k-1] # reverse-order here print ("translated", subs, translated)