From: Paul Mackerras Date: Mon, 3 Jul 2023 11:09:33 +0000 (+1000) Subject: Move insn_codes for mcrfs, mtfsb0/1 and mtfsfi X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7af0e001adaf5f4528f4916e80a7ada904f378ca;p=microwatt.git Move insn_codes for mcrfs, mtfsb0/1 and mtfsfi This moves the insn_code values for mcrfs, mtfsb0/1 and mtfsfi into the region used for floating-point instructions. This means that in no-FPU implementations, they will get turned into illegal instructions in predecode. We then don't need the code in execute1 that makes FP instructions illegal in no-FPU implementations. We also remove the NONE value for unit_t, since it was only ever used with insn_type = OP_ILLEGAL, and the check for unit = NONE was redundant with the check for insn_type = OP_ILLEGAL. Thus the check for unit = NONE is no longer needed and is removed here. Signed-off-by: Paul Mackerras --- diff --git a/common.vhdl b/common.vhdl index 7c7a8d5..44302c7 100644 --- a/common.vhdl +++ b/common.vhdl @@ -361,7 +361,7 @@ package common is dec_ctr : std_ulogic; end record; constant Decode2ToExecute1Init : Decode2ToExecute1Type := - (valid => '0', unit => NONE, fac => NONE, insn_type => OP_ILLEGAL, instr_tag => instr_tag_init, + (valid => '0', unit => ALU, fac => NONE, insn_type => OP_ILLEGAL, instr_tag => instr_tag_init, write_reg_enable => '0', lr => '0', br_abs => '0', rc => '0', oe => '0', invert_a => '0', invert_out => '0', input_carry => ZERO, output_carry => '0', input_cr => '0', diff --git a/decode1.vhdl b/decode1.vhdl index 559a505..c987bec 100644 --- a/decode1.vhdl +++ b/decode1.vhdl @@ -64,7 +64,7 @@ architecture behaviour of decode1 is constant decode_rom : decoder_rom_t := ( -- unit fac internal in1 in2 in3 out CR CR inv inv cry cry ldst BR sgn upd rsrv 32b sgn rc lk sgl rpt -- op in out A out in out len ext pipe - INSN_illegal => (NONE, NONE, OP_ILLEGAL, NONE, NONE, NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', NONE), + INSN_illegal => (ALU, NONE, OP_ILLEGAL, NONE, NONE, NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', NONE), INSN_fetch_fail => (LDST, NONE, OP_FETCH_FAILED, CIA, NONE, NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', NONE), INSN_add => (ALU, NONE, OP_ADD, RA, RB, NONE, RT, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', RCOE, '0', '0', NONE), @@ -347,7 +347,7 @@ architecture behaviour of decode1 is INSN_xori => (ALU, NONE, OP_XOR, NONE, CONST_UI, RS, RA, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', NONE), INSN_xoris => (ALU, NONE, OP_XOR, NONE, CONST_UI_HI, RS, RA, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', NONE), - others => (NONE, NONE, OP_ILLEGAL, NONE, NONE, NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', NONE) + others => (ALU, NONE, OP_ILLEGAL, NONE, NONE, NONE, NONE, '0', '0', '0', '0', ZERO, '0', NONE, '0', '0', '0', '0', '0', '0', NONE, '0', '0', NONE) ); function decode_ram_spr(sprn : spr_num_t) return ram_spr_info is diff --git a/decode_types.vhdl b/decode_types.vhdl index 7ceb2ae..e9f6e70 100644 --- a/decode_types.vhdl +++ b/decode_types.vhdl @@ -84,60 +84,57 @@ package decode_types is INSN_lwz, INSN_lwzu, -- 50 INSN_mcrf, - INSN_mcrfs, INSN_mcrxrx, INSN_mfcr, INSN_mfmsr, INSN_mfspr, INSN_mtcrf, - INSN_mtfsb, - INSN_mtfsfi, - INSN_mtmsr, -- 60 + INSN_mtmsr, INSN_mtmsrd, INSN_mtspr, - INSN_mulli, + INSN_mulli, -- 60 INSN_neg, INSN_nop, INSN_ori, INSN_oris, INSN_popcntb, INSN_popcntw, - INSN_popcntd, -- 70 + INSN_popcntd, INSN_prtyw, INSN_prtyd, - INSN_rfid, + INSN_rfid, -- 70 INSN_rldic, INSN_rldicl, INSN_rldicr, INSN_rldimi, INSN_rlwimi, INSN_rlwinm, - INSN_sc, -- 80 + INSN_sc, INSN_setb, INSN_slbia, - INSN_sradi, + INSN_sradi, -- 80 INSN_srawi, INSN_stb, INSN_stbu, INSN_std, INSN_stdu, INSN_sth, - INSN_sthu, -- 90 + INSN_sthu, INSN_stw, INSN_stwu, - INSN_subfic, + INSN_subfic, -- 90 INSN_subfme, INSN_subfze, INSN_sync, INSN_tdi, INSN_tlbsync, INSN_twi, - INSN_wait, -- 100 + INSN_wait, INSN_xori, INSN_xoris, -- pad to 112 to simplify comparison logic - INSN_103, + INSN_100, INSN_101, INSN_102, INSN_103, INSN_104, INSN_105, INSN_106, INSN_107, INSN_108, INSN_109, INSN_110, INSN_111, @@ -289,59 +286,64 @@ package decode_types is INSN_lfiwzx, INSN_lfsx, INSN_lfsux, - INSN_275, -- padding + -- These are here in order to keep the FP instructions together + INSN_mcrfs, + INSN_mtfsb, + INSN_mtfsfi, + INSN_278, -- padding + INSN_279, -- The following instructions access FRA and/or FRB operands - INSN_fabs, + INSN_fabs, -- 280 INSN_fadd, INSN_fadds, INSN_fcfid, - INSN_fcfids, -- 280 + INSN_fcfids, INSN_fcfidu, INSN_fcfidus, INSN_fcmpo, INSN_fcmpu, INSN_fcpsgn, - INSN_fctid, + INSN_fctid, -- 290 INSN_fctidz, INSN_fctidu, INSN_fctiduz, - INSN_fctiw, -- 290 + INSN_fctiw, INSN_fctiwz, INSN_fctiwu, INSN_fctiwuz, INSN_fdiv, INSN_fdivs, - INSN_fmr, + INSN_fmr, -- 300 INSN_fmrgew, INSN_fmrgow, INSN_fnabs, - INSN_fneg, -- 300 + INSN_fneg, INSN_fre, INSN_fres, INSN_frim, INSN_frin, INSN_frip, - INSN_friz, + INSN_friz, -- 310 INSN_frsp, INSN_frsqrte, INSN_frsqrtes, - INSN_fsqrt, -- 310 + INSN_fsqrt, INSN_fsqrts, INSN_fsub, INSN_fsubs, INSN_ftdiv, INSN_ftsqrt, - INSN_mffs, + INSN_mffs, -- 320 INSN_mtfsf, - -- pad to 320 - INSN_318, INSN_319, + -- pad to 328 + INSN_322, INSN_323, INSN_324, INSN_325, INSN_326, INSN_327, -- The following instructions access FRA, FRB (possibly) and FRC operands - INSN_fmul, -- 320 + INSN_fmul, INSN_fmuls, - INSN_fmadd, + INSN_fmadd, -- 330 INSN_fmadds, INSN_fmsub, INSN_fmsubs, @@ -349,7 +351,7 @@ package decode_types is INSN_fnmadds, INSN_fnmsub, INSN_fnmsubs, - INSN_fsel -- 330 + INSN_fsel ); constant INSN_first_rb : insn_code := INSN_add; @@ -384,7 +386,7 @@ package decode_types is constant TOO_OFFSET : integer := 0; - type unit_t is (NONE, ALU, LDST, FPU); + type unit_t is (ALU, LDST, FPU); type facility_t is (NONE, FPU); type length_t is (NONE, is1B, is2B, is4B, is8B); @@ -425,7 +427,7 @@ package decode_types is sgl_pipe : std_ulogic; repeat : repeat_t; end record; - constant decode_rom_init : decode_rom_t := (unit => NONE, facility => NONE, + constant decode_rom_init : decode_rom_t := (unit => ALU, facility => NONE, insn_type => OP_ILLEGAL, input_reg_a => NONE, input_reg_b => NONE, input_reg_c => NONE, output_reg_a => NONE, input_cr => '0', output_cr => '0', diff --git a/execute1.vhdl b/execute1.vhdl index e31f4d6..db1159d 100644 --- a/execute1.vhdl +++ b/execute1.vhdl @@ -1028,11 +1028,6 @@ begin privileged := '1'; end if; - if (not HAS_FPU and e_in.fac = FPU) or e_in.unit = NONE then - -- make lfd/stfd/lfs/stfs etc. illegal in no-FPU implementations - illegal := '1'; - end if; - v.do_trace := ex1.msr(MSR_SE); case_0: case e_in.insn_type is when OP_ILLEGAL =>