From: lkcl Date: Thu, 2 Sep 2021 14:23:50 +0000 (+0100) Subject: (no commit message) X-Git-Tag: DRAFT_SVP64_0_1~251 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7b20ef26d1e32e22ed5d23968607c7d76c80e692;p=libreriscv.git --- diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn index 75836fed7..8427702aa 100644 --- a/openpower/sv/branches.mdwn +++ b/openpower/sv/branches.mdwn @@ -81,7 +81,13 @@ which may be enabled and combined): It is also important to note that Vectorised Branches can be used in either SVP64 Horizontal-First or Vertical-First Mode. Essentially -the behaviour is identical in both Modes. +the behaviour is identical in both Modes. It is also important +to bear in mind that, fundamentally, Vectorised Branch-Conditional +is still extremely close to the Scalar v3.0B Branch-Conditional +instructions, and that the same v3.0B Scalar Branch-Conditional +instructions are still +*completely separate and independent*, being unaltered and +ubaffected by their SVP64 variants in every conceivable way. # Format and fields