From: Luke Kenneth Casson Leighton Date: Tue, 4 Oct 2022 11:12:36 +0000 (+0100) Subject: add zero-overhead loop link X-Git-Tag: opf_rfc_ls005_v1~196 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7b79da37f41b63dca7c0add1390224573efaafb4;p=libreriscv.git add zero-overhead loop link --- diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index 6bfb08dd4..6a8350179 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -136,7 +136,8 @@ long-term stability and binary interoperability. The fundamental principle of Simple-V is that it sits between Issue and Decode, pausing the Program-Counter to service a "Sub-PC" -hardware for-loop. This is very similar to "Zero-Overhead Loops" +hardware for-loop. This is very similar to +[Zero-Overhead Loops](https://en.m.wikipedia.org/wiki/Zero-overhead_looping) in High-end DSPs (TI MSP Series). Considerable effort has been expended to ensure that Simple-V is @@ -644,7 +645,9 @@ For each of EXT059 and EXT063: # Adding new opcodes. -With Simple-V being a type of Zero-Overhead Loop Engine on top of +With Simple-V being a type of +[Zero-Overhead Loop](https://en.m.wikipedia.org/wiki/Zero-overhead_looping) +Engine on top of Scalar operations some clear guidelines are needed on how both existing "Defined Words" (Public v3.1 Section 1.6.3 term) and future Scalar operations are added within the 64-bit space. Examples of