From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 24 Sep 2022 16:21:41 +0000 (+0100)
Subject: check variable rather than explicit == LDST_IDX
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7b84a8c0155b026ee9d7c46928b76655fc8362a1;p=openpower-isa.git

check variable rather than explicit == LDST_IDX
---

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index 6e86f618..7bf93eff 100644
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1155,7 +1155,7 @@ class SVP64Asm:
                 vli = True
             elif encmode == 'sea':
                 assert sv_mode in (None, 0b00, 0b01)
-                assert rm['mode'] == "LDST_IDX"
+                assert is_ldst_idx
                 sea = True
                 assert failfirst is False, "cannot use ffirst+signed-address"
             elif is_bc: