From: lkcl <lkcl@web>
Date: Mon, 20 Jun 2022 00:27:27 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7bd21a2ea86060d9d2c18443a335255404d879ed;p=libreriscv.git

---

diff --git a/openpower/sv/vector_ops.mdwn b/openpower/sv/vector_ops.mdwn
index ab57518a8..0c4197522 100644
--- a/openpower/sv/vector_ops.mdwn
+++ b/openpower/sv/vector_ops.mdwn
@@ -180,7 +180,9 @@ The vmsbf.m instruction takes a mask register as input and writes results to a m
 
 Executable demo:
 
+```
 [[!inline quick="yes" raw="yes" pages="openpower/sv/sbf.py"]]
+```
 
 ## sifm