From: Tobias Platen Date: Thu, 28 Oct 2021 17:20:53 +0000 (+0200) Subject: test_compldst_multi_mmu.py: use nmigen.compat.sim X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7beae2372135984872754bf97e30e259e791599e;p=soc.git test_compldst_multi_mmu.py: use nmigen.compat.sim --- diff --git a/src/soc/experiment/test/test_compldst_multi_mmu.py b/src/soc/experiment/test/test_compldst_multi_mmu.py index b5d69597..8f5fcf1a 100644 --- a/src/soc/experiment/test/test_compldst_multi_mmu.py +++ b/src/soc/experiment/test/test_compldst_multi_mmu.py @@ -1,7 +1,7 @@ # test case for LOAD / STORE Computation Unit using MMU #from nmigen.compat.sim import run_simulation -from nmigen.sim import Simulator, Delay, Settle +from nmigen.compat.sim import Simulator, Delay, Settle from nmigen.cli import verilog, rtlil from nmigen import Module, Signal, Mux, Cat, Elaboratable, Array, Repl from nmigen.hdl.rec import Record, Layout