From: Thiemo Seufer Date: Sun, 2 Mar 2003 21:30:15 +0000 (+0000) Subject: * elf32-mips.c (elf_mips_howto_table_rel): Change definition of X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7c2be35cae27fc6965fea7023a438a8a9872af01;p=binutils-gdb.git * elf32-mips.c (elf_mips_howto_table_rel): Change definition of R_MIPS_PC16 to rightshift 2. (elf_reloc_map mips_reloc_map): Map to rightshifted BFD reloc. (bfd_elf32_bfd_reloc_type_lookup): Support BFD_RELOC_MIPSEMB_16_PCREL_S2. * elf64-mips.c (mips_elf64_howto_table_rel): Change definition of R_MIPS_PC16 to rightshift 2. (mips_elf64_howto_table_rela): Likewise. (mips_reloc_map): Map to rightshifted BFD reloc. * elfn32-mips.c: The same as in elf64-mips.c. * elfxx-mips.c (mips_elf_got_for_ibfd): Typo in comment. (mips_elf_calculate_relocation): Handle rightshifted addends for R_MIPS_PC16. * reloc.c (BFD_RELOC_MIPSEMB_16_PCREL_S2): New BFD relocation for MIPS Embedded PIC. Remove superfluous empty COMMENT. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * config/tc-mips.c (append_insn): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. Avoid emitting unneeded BFD_RELOC_16_PCREL_S2 relocs and add earlier warnings about misaligned address and reange overflow. (macro_build): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. Add earlier warnings about misaligned address and reange overflow. (mips_ip): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. (md_apply_fix): Likewise. Fix warning output. (tc_gen_reloc): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. Allow BFD_RELOC_16_PCREL_S2 for all ABIs. (md_convert_frag): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. * gas/mips/bge.d: Reactivate external branch tests. * gas/mips/bge.s: Likewise. * gas/mips/bgeu.d: Likewise. * gas/mips/bgeu.s: Likewise. * gas/mips/blt.d: Likewise. * gas/mips/blt.s: Likewise. * gas/mips/bltu.d: Likewise. * gas/mips/bltu.s: Likewise. * gas/mips/branch-misc-2.d: New File. * gas/mips/branch-misc-2.l: Remove. * gas/mips/mips.exp: Adjust branch-misc-2 test. --- diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 869d5c56b3d..17123869e50 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,23 @@ +2003-03-02 Thiemo Seufer + + * elf32-mips.c (elf_mips_howto_table_rel): Change definition of + R_MIPS_PC16 to rightshift 2. + (elf_reloc_map mips_reloc_map): Map to rightshifted BFD reloc. + (bfd_elf32_bfd_reloc_type_lookup): Support + BFD_RELOC_MIPSEMB_16_PCREL_S2. + * elf64-mips.c (mips_elf64_howto_table_rel): Change definition of + R_MIPS_PC16 to rightshift 2. + (mips_elf64_howto_table_rela): Likewise. + (mips_reloc_map): Map to rightshifted BFD reloc. + * elfn32-mips.c: The same as in elf64-mips.c. + * elfxx-mips.c (mips_elf_got_for_ibfd): Typo in comment. + (mips_elf_calculate_relocation): Handle rightshifted addends for + R_MIPS_PC16. + * reloc.c (BFD_RELOC_MIPSEMB_16_PCREL_S2): New BFD relocation for + MIPS Embedded PIC. Remove superfluous empty COMMENT. + * libbfd.h: Regenerate. + * bfd-in2.h: Regenerate. + 2003-02-28 Richard Henderson * elfxx-ia64.c (elfNN_ia64_relax_section): Correct bounds diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 2385c409a5c..9540eeb26a2 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -2331,6 +2331,9 @@ to compensate for the borrow when the low bits are added. */ /* Like BFD_RELOC_LO16, but PC relative. */ BFD_RELOC_PCREL_LO16, +/* Like BFD_RELOC_16_PCREL_S2, but for MIPS Embedded PIC. */ + BFD_RELOC_MIPSEMB_16_PCREL_S2, + /* Relocation against a MIPS literal section. */ BFD_RELOC_MIPS_LITERAL, diff --git a/bfd/elf32-mips.c b/bfd/elf32-mips.c index 1399f003128..cf705d502f0 100644 --- a/bfd/elf32-mips.c +++ b/bfd/elf32-mips.c @@ -261,9 +261,11 @@ static reloc_howto_type elf_mips_howto_table_rel[] = 0x0000ffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* 16 bit PC relative reference. */ + /* 16 bit PC relative reference. Note that the ABI document has a typo + and claims R_MIPS_PC16 to be not rightshifted, rendering it useless. + We do the right thing here. */ HOWTO (R_MIPS_PC16, /* type */ - 0, /* rightshift */ + 2, /* rightshift */ 2, /* size (0 = byte, 1 = short, 2 = long) */ 16, /* bitsize */ TRUE, /* pc_relative */ @@ -1401,7 +1403,7 @@ static const struct elf_reloc_map mips_reloc_map[] = { BFD_RELOC_GPREL16, R_MIPS_GPREL16 }, { BFD_RELOC_MIPS_LITERAL, R_MIPS_LITERAL }, { BFD_RELOC_MIPS_GOT16, R_MIPS_GOT16 }, - { BFD_RELOC_16_PCREL, R_MIPS_PC16 }, + { BFD_RELOC_16_PCREL_S2, R_MIPS_PC16 }, { BFD_RELOC_MIPS_CALL16, R_MIPS_CALL16 }, { BFD_RELOC_GPREL32, R_MIPS_GPREL32 }, { BFD_RELOC_MIPS_GOT_HI16, R_MIPS_GOT_HI16 }, @@ -1458,7 +1460,7 @@ bfd_elf32_bfd_reloc_type_lookup (abfd, code) return &elf_mips_gnu_rel_hi16; case BFD_RELOC_PCREL_LO16: return &elf_mips_gnu_rel_lo16; - case BFD_RELOC_16_PCREL_S2: + case BFD_RELOC_MIPSEMB_16_PCREL_S2: return &elf_mips_gnu_rel16_s2; case BFD_RELOC_64_PCREL: return &elf_mips_gnu_pcrel64; diff --git a/bfd/elf64-mips.c b/bfd/elf64-mips.c index d29f2862ea6..807ddf5f22f 100644 --- a/bfd/elf64-mips.c +++ b/bfd/elf64-mips.c @@ -300,9 +300,11 @@ static reloc_howto_type mips_elf64_howto_table_rel[] = 0x0000ffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* 16 bit PC relative reference. */ + /* 16 bit PC relative reference. Note that the ABI document has a typo + and claims R_MIPS_PC16 to be not rightshifted, rendering it useless. + We do the right thing here. */ HOWTO (R_MIPS_PC16, /* type */ - 0, /* rightshift */ + 2, /* rightshift */ 2, /* size (0 = byte, 1 = short, 2 = long) */ 16, /* bitsize */ TRUE, /* pc_relative */ @@ -795,9 +797,11 @@ static reloc_howto_type mips_elf64_howto_table_rela[] = 0x0000ffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* 16 bit PC relative reference. */ + /* 16 bit PC relative reference. Note that the ABI document has a typo + and claims R_MIPS_PC16 to be not rightshifted, rendering it useless. + We do the right thing here. */ HOWTO (R_MIPS_PC16, /* type */ - 0, /* rightshift */ + 2, /* rightshift */ 2, /* size (0 = byte, 1 = short, 2 = long) */ 16, /* bitsize */ TRUE, /* pc_relative */ @@ -1894,7 +1898,7 @@ static const struct elf_reloc_map mips_reloc_map[] = /* There is no BFD reloc for R_MIPS_REL32. */ { BFD_RELOC_64, R_MIPS_64 }, { BFD_RELOC_CTOR, R_MIPS_64 }, - { BFD_RELOC_16_PCREL, R_MIPS_PC16 }, + { BFD_RELOC_16_PCREL_S2, R_MIPS_PC16 }, { BFD_RELOC_HI16_S, R_MIPS_HI16 }, { BFD_RELOC_LO16, R_MIPS_LO16 }, { BFD_RELOC_GPREL16, R_MIPS_GPREL16 }, diff --git a/bfd/elfn32-mips.c b/bfd/elfn32-mips.c index 00a0e88c1ce..b2d745bdfbc 100644 --- a/bfd/elfn32-mips.c +++ b/bfd/elfn32-mips.c @@ -275,9 +275,11 @@ static reloc_howto_type elf_mips_howto_table_rel[] = 0x0000ffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* 16 bit PC relative reference. */ + /* 16 bit PC relative reference. Note that the ABI document has a typo + and claims R_MIPS_PC16 to be not rightshifted, rendering it useless. + We do the right thing here. */ HOWTO (R_MIPS_PC16, /* type */ - 0, /* rightshift */ + 2, /* rightshift */ 2, /* size (0 = byte, 1 = short, 2 = long) */ 16, /* bitsize */ TRUE, /* pc_relative */ @@ -772,9 +774,11 @@ static reloc_howto_type elf_mips_howto_table_rela[] = 0x0000ffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* 16 bit PC relative reference. */ + /* 16 bit PC relative reference. Note that the ABI document has a typo + and claims R_MIPS_PC16 to be not rightshifted, rendering it useless. + We do the right thing here. */ HOWTO (R_MIPS_PC16, /* type */ - 0, /* rightshift */ + 2, /* rightshift */ 2, /* size (0 = byte, 1 = short, 2 = long) */ 16, /* bitsize */ TRUE, /* pc_relative */ @@ -1837,7 +1841,7 @@ static const struct elf_reloc_map mips_reloc_map[] = /* There is no BFD reloc for R_MIPS_REL32. */ { BFD_RELOC_CTOR, R_MIPS_32 }, { BFD_RELOC_64, R_MIPS_64 }, - { BFD_RELOC_16_PCREL, R_MIPS_PC16 }, + { BFD_RELOC_16_PCREL_S2, R_MIPS_PC16 }, { BFD_RELOC_HI16_S, R_MIPS_HI16 }, { BFD_RELOC_LO16, R_MIPS_LO16 }, { BFD_RELOC_GPREL16, R_MIPS_GPREL16 }, diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 2295fa8b17c..6ca4f063af2 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -496,7 +496,6 @@ static struct mips_got_info *mips_elf_got_for_ibfd static bfd *reldyn_sorting_bfd; /* Nonzero if ABFD is using the N32 ABI. */ - #define ABI_N32_P(abfd) \ ((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI2) != 0) @@ -2130,7 +2129,7 @@ mips_elf_bfd2got_entry_eq (entry1, entry2) return e1->bfd == e2->bfd; } -/* In a multi-got link, determine the GOT to be used for IBDF. G must +/* In a multi-got link, determine the GOT to be used for IBFD. G must be the master GOT data. */ static struct mips_got_info * @@ -3316,12 +3315,6 @@ mips_elf_calculate_relocation (abfd, input_bfd, input_section, info, value &= howto->dst_mask; break; - case R_MIPS_GNU_REL16_S2: - value = symbol + mips_elf_sign_extend (addend << 2, 18) - p; - overflowed_p = mips_elf_overflow_p (value, 18); - value = (value >> 2) & howto->dst_mask; - break; - case R_MIPS_GNU_REL_HI16: /* Instead of subtracting 'p' here, we should be subtracting the equivalent value for the LO part of the reloc, since the value @@ -3450,8 +3443,10 @@ mips_elf_calculate_relocation (abfd, input_bfd, input_section, info, break; case R_MIPS_PC16: - value = mips_elf_sign_extend (addend, 16) + symbol - p; - overflowed_p = mips_elf_overflow_p (value, 16); + case R_MIPS_GNU_REL16_S2: + value = mips_elf_sign_extend (addend << 2, 18) + symbol - p; + overflowed_p = mips_elf_overflow_p (value, 18); + value = (value >> 2) & howto->dst_mask; break; case R_MIPS_GOT_HI16: diff --git a/bfd/libbfd.h b/bfd/libbfd.h index 222b23dcb5d..14978ba862f 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -850,6 +850,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_LO16", "BFD_RELOC_PCREL_HI16_S", "BFD_RELOC_PCREL_LO16", + "BFD_RELOC_MIPSEMB_16_PCREL_S2", "BFD_RELOC_MIPS_LITERAL", "BFD_RELOC_MIPS_GOT16", "BFD_RELOC_MIPS_CALL16", diff --git a/bfd/reloc.c b/bfd/reloc.c index 9f8a952c591..45660c8387e 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -2080,7 +2080,10 @@ ENUM BFD_RELOC_PCREL_LO16 ENUMDOC Like BFD_RELOC_LO16, but PC relative. - +ENUM + BFD_RELOC_MIPSEMB_16_PCREL_S2 +ENUMDOC + Like BFD_RELOC_16_PCREL_S2, but for MIPS Embedded PIC. ENUM BFD_RELOC_MIPS_LITERAL ENUMDOC @@ -2150,7 +2153,6 @@ ENUMX ENUMDOC Fujitsu Frv Relocations. COMMENT -COMMENT ENUMDOC MIPS ELF relocations. diff --git a/gas/ChangeLog b/gas/ChangeLog index f9fc360051c..dc46fb38dbf 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,17 @@ +2003-03-02 Thiemo Seufer + + * config/tc-mips.c (append_insn): Add handling of + BFD_RELOC_MIPSEMB_16_PCREL_S2. Avoid emitting unneeded + BFD_RELOC_16_PCREL_S2 relocs and add earlier warnings about + misaligned address and reange overflow. + (macro_build): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. Add + earlier warnings about misaligned address and reange overflow. + (mips_ip): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. + (md_apply_fix): Likewise. Fix warning output. + (tc_gen_reloc): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. + Allow BFD_RELOC_16_PCREL_S2 for all ABIs. + (md_convert_frag): Add handling of BFD_RELOC_MIPSEMB_16_PCREL_S2. + 2003-02-21 Nick Clifton * NEWS: Mention availability of test generator program. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index e075cc9cf55..c71d3308ca8 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -2018,7 +2018,8 @@ append_insn (place, ip, address_expr, reloc_type) if (place == NULL && address_expr - && *reloc_type == BFD_RELOC_16_PCREL_S2 + && (*reloc_type == BFD_RELOC_16_PCREL_S2 + || *reloc_type == BFD_RELOC_MIPSEMB_16_PCREL_S2) && (pinfo & INSN_UNCOND_BRANCH_DELAY || pinfo & INSN_COND_BRANCH_DELAY || pinfo & INSN_COND_BRANCH_LIKELY) && mips_relax_branch @@ -2140,6 +2141,18 @@ append_insn (place, ip, address_expr, reloc_type) break; case BFD_RELOC_16_PCREL_S2: + if ((address_expr->X_add_number & 3) != 0) + as_bad (_("branch to misaligned address (0x%lx)"), + (unsigned long) address_expr->X_add_number); + if (mips_relax_branch) + goto need_reloc; + if ((address_expr->X_add_number + 0x20000) & ~0x3ffff) + as_bad (_("branch address range overflow (0x%lx)"), + (unsigned long) address_expr->X_add_number); + ip->insn_opcode |= (address_expr->X_add_number >> 2) & 0xffff; + break; + + case BFD_RELOC_MIPSEMB_16_PCREL_S2: goto need_reloc; default: @@ -2154,7 +2167,8 @@ append_insn (place, ip, address_expr, reloc_type) { fixp[0] = fix_new_exp (frag_now, f - frag_now->fr_literal, 4, address_expr, - *reloc_type == BFD_RELOC_16_PCREL_S2, + (*reloc_type == BFD_RELOC_16_PCREL_S2 + || *reloc_type == BFD_RELOC_MIPSEMB_16_PCREL_S2), reloc_type[0]); /* These relocations can have an addend that won't fit in @@ -3104,20 +3118,32 @@ macro_build (place, counter, ep, name, fmt, va_alist) case 'p': assert (ep != NULL); + /* * This allows macro() to pass an immediate expression for * creating short branches without creating a symbol. - * Note that the expression still might come from the assembly - * input, in which case the value is not checked for range nor - * is a relocation entry generated (yuck). + * + * We don't allow branch relaxation for these branches, as + * they should only appear in ".set nomacro" anyway. */ if (ep->X_op == O_constant) { + if ((ep->X_add_number & 3) != 0) + as_bad (_("branch to misaligned address (0x%lx)"), + (unsigned long) ep->X_add_number); + if ((ep->X_add_number + 0x20000) & ~0x3ffff) + as_bad (_("branch address range overflow (0x%lx)"), + (unsigned long) ep->X_add_number); insn.insn_opcode |= (ep->X_add_number >> 2) & 0xffff; ep = NULL; } else - *r = BFD_RELOC_16_PCREL_S2; + { + if (mips_pic == EMBEDDED_PIC) + *r = BFD_RELOC_MIPSEMB_16_PCREL_S2; + else + *r = BFD_RELOC_16_PCREL_S2; + } continue; case 'a': @@ -9154,7 +9180,10 @@ mips_ip (str, ip) continue; case 'p': /* pc relative offset */ - *offset_reloc = BFD_RELOC_16_PCREL_S2; + if (mips_pic == EMBEDDED_PIC) + *offset_reloc = BFD_RELOC_MIPSEMB_16_PCREL_S2; + else + *offset_reloc = BFD_RELOC_16_PCREL_S2; my_getExpression (&offset_expr, s); s = expr_end; continue; @@ -11171,7 +11200,8 @@ md_apply_fix3 (fixP, valP, seg) /* BFD's REL handling, for MIPS, is _very_ weird. This gives the right results, but it can't possibly be the way things are supposed to work. */ - if (fixP->fx_r_type != BFD_RELOC_16_PCREL_S2 + if ((fixP->fx_r_type != BFD_RELOC_16_PCREL_S2 + && fixP->fx_r_type != BFD_RELOC_MIPSEMB_16_PCREL_S2) || S_GET_SEGMENT (fixP->fx_addsy) != undefined_section) value += fixP->fx_frag->fr_address + fixP->fx_where; } @@ -11341,9 +11371,10 @@ md_apply_fix3 (fixP, valP, seg) break; case BFD_RELOC_16_PCREL_S2: + case BFD_RELOC_MIPSEMB_16_PCREL_S2: if ((value & 0x3) != 0) as_bad_where (fixP->fx_file, fixP->fx_line, - _("Branch to odd address (%lx)"), (long) value); + _("Branch to misaligned address (%lx)"), (long) value); /* * We need to save the bits in the instruction since fixup_segment() @@ -11356,8 +11387,7 @@ md_apply_fix3 (fixP, valP, seg) do the store, so it must be done here. This is probably a bug somewhere. */ if (!fixP->fx_done - && (fixP->fx_r_type != BFD_RELOC_16_PCREL_S2 - || fixP->fx_addsy == NULL /* ??? */ + && (fixP->fx_addsy == NULL /* ??? */ || ! S_IS_DEFINED (fixP->fx_addsy))) value -= fixP->fx_frag->fr_address + fixP->fx_where; @@ -13351,6 +13381,7 @@ tc_gen_reloc (section, fixp) case BFD_RELOC_32_PCREL: case BFD_RELOC_64_PCREL: case BFD_RELOC_16_PCREL_S2: + case BFD_RELOC_MIPSEMB_16_PCREL_S2: case BFD_RELOC_PCREL_HI16_S: case BFD_RELOC_PCREL_LO16: break; @@ -13374,17 +13405,7 @@ tc_gen_reloc (section, fixp) reloc->addend += S_GET_VALUE (fixp->fx_addsy); #endif - /* To support a PC relative reloc when generating embedded PIC code - for ECOFF, we use a Cygnus extension. We check for that here to - make sure that we don't let such a reloc escape normally. */ - if ((OUTPUT_FLAVOR == bfd_target_ecoff_flavour - || OUTPUT_FLAVOR == bfd_target_elf_flavour) - && code == BFD_RELOC_16_PCREL_S2 - && mips_pic != EMBEDDED_PIC) - reloc->howto = NULL; - else - reloc->howto = bfd_reloc_type_lookup (stdoutput, code); - + reloc->howto = bfd_reloc_type_lookup (stdoutput, code); if (reloc->howto == NULL) { as_bad_where (fixp->fx_file, fixp->fx_line, @@ -13470,8 +13491,9 @@ md_convert_frag (abfd, asec, fragp) exp.X_add_number = fragp->fr_offset; fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal, - 4, &exp, 1, - BFD_RELOC_16_PCREL_S2); + 4, &exp, 1, ((mips_pic == EMBEDDED_PIC) + ? BFD_RELOC_MIPSEMB_16_PCREL_S2 + : BFD_RELOC_16_PCREL_S2)); fixp->fx_file = fragp->fr_file; fixp->fx_line = fragp->fr_line; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index f4d9e736a54..c3a4788521c 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,17 @@ +2003-03-02 Thiemo Seufer + + * gas/mips/bge.d: Reactivate external branch tests. + * gas/mips/bge.s: Likewise. + * gas/mips/bgeu.d: Likewise. + * gas/mips/bgeu.s: Likewise. + * gas/mips/blt.d: Likewise. + * gas/mips/blt.s: Likewise. + * gas/mips/bltu.d: Likewise. + * gas/mips/bltu.s: Likewise. + * gas/mips/branch-misc-2.d: New File. + * gas/mips/branch-misc-2.l: Remove. + * gas/mips/mips.exp: Adjust branch-misc-2 test. + 2003-02-21 Nick Clifton * gas/all/test-gen.c: New file: Framework for automatically diff --git a/gas/testsuite/gas/mips/bge.d b/gas/testsuite/gas/mips/bge.d index 7924c024d2c..26952deff8e 100644 --- a/gas/testsuite/gas/mips/bge.d +++ b/gas/testsuite/gas/mips/bge.d @@ -51,20 +51,20 @@ Disassembly of section .text: 0+00a8 <[^>]*> slt at,a1,a0 0+00ac <[^>]*> bnezl at,0+0000 0+00b0 <[^>]*> nop -#0+00b4 <[^>]*> slt at,a0,a1 -#0+00b8 <[^>]*> beqz at,000000b8 -#[ ]*b8: R_MIPS_PC16 external_label -#0+00bc <[^>]*> nop -#0+00c0 <[^>]*> slt at,a1,a0 -#0+00c4 <[^>]*> bnez at,000000c4 -#[ ]*c4: R_MIPS_PC16 external_label -#0+00c8 <[^>]*> nop -#0+00cc <[^>]*> slt at,a0,a1 -#0+00d0 <[^>]*> beqzl at,000000d0 -#[ ]*d0: R_MIPS_PC16 external_label -#0+00d4 <[^>]*> nop -#0+00d8 <[^>]*> slt at,a1,a0 -#0+00dc <[^>]*> bnezl at,000000dc -#[ ]*dc: R_MIPS_PC16 external_label -#0+00e0 <[^>]*> nop +0+00b4 <[^>]*> slt at,a0,a1 +0+00b8 <[^>]*> beqz at,000000b8 +[ ]*b8: R_MIPS_PC16 external_label +0+00bc <[^>]*> nop +0+00c0 <[^>]*> slt at,a1,a0 +0+00c4 <[^>]*> bnez at,000000c4 +[ ]*c4: R_MIPS_PC16 external_label +0+00c8 <[^>]*> nop +0+00cc <[^>]*> slt at,a0,a1 +0+00d0 <[^>]*> beqzl at,000000d0 +[ ]*d0: R_MIPS_PC16 external_label +0+00d4 <[^>]*> nop +0+00d8 <[^>]*> slt at,a1,a0 +0+00dc <[^>]*> bnezl at,000000dc +[ ]*dc: R_MIPS_PC16 external_label +0+00e0 <[^>]*> nop ... diff --git a/gas/testsuite/gas/mips/bge.s b/gas/testsuite/gas/mips/bge.s index bedab79401d..4b4e58f6d69 100644 --- a/gas/testsuite/gas/mips/bge.s +++ b/gas/testsuite/gas/mips/bge.s @@ -25,10 +25,10 @@ text_label: bgtl $4,$5,text_label # Branch to an external label. -# bge $4,$5,external_label -# bgt $4,$5,external_label -# bgel $4,$5,external_label -# bgtl $4,$5,external_label + bge $4,$5,external_label + bgt $4,$5,external_label + bgel $4,$5,external_label + bgtl $4,$5,external_label # Round to a 16 byte boundary, for ease in testing multiple targets. nop diff --git a/gas/testsuite/gas/mips/bgeu.d b/gas/testsuite/gas/mips/bgeu.d index d927956416f..ace226e9eb4 100644 --- a/gas/testsuite/gas/mips/bgeu.d +++ b/gas/testsuite/gas/mips/bgeu.d @@ -45,20 +45,20 @@ Disassembly of section .text: 0+0090 <[^>]*> sltu at,a1,a0 0+0094 <[^>]*> bnezl at,0+0000 0+0098 <[^>]*> nop -#0+009c <[^>]*> sltu at,a0,a1 -#0+00a0 <[^>]*> beqz at,000000a0 -#[ ]*a0: R_MIPS_PC16 external_label -#0+00a4 <[^>]*> nop -#0+00a8 <[^>]*> sltu at,a1,a0 -#0+00ac <[^>]*> bnez at,000000ac -#[ ]*ac: R_MIPS_PC16 external_label -#0+00b0 <[^>]*> nop -#0+00b4 <[^>]*> sltu at,a0,a1 -#0+00b8 <[^>]*> beqzl at,000000b8 -#[ ]*b8: R_MIPS_PC16 external_label -#0+00bc <[^>]*> nop -#0+00c0 <[^>]*> sltu at,a1,a0 -#0+00c4 <[^>]*> bnezl at,000000c4 -#[ ]*c4: R_MIPS_PC16 external_label -#0+00c8 <[^>]*> nop +0+009c <[^>]*> sltu at,a0,a1 +0+00a0 <[^>]*> beqz at,000000a0 +[ ]*a0: R_MIPS_PC16 external_label +0+00a4 <[^>]*> nop +0+00a8 <[^>]*> sltu at,a1,a0 +0+00ac <[^>]*> bnez at,000000ac +[ ]*ac: R_MIPS_PC16 external_label +0+00b0 <[^>]*> nop +0+00b4 <[^>]*> sltu at,a0,a1 +0+00b8 <[^>]*> beqzl at,000000b8 +[ ]*b8: R_MIPS_PC16 external_label +0+00bc <[^>]*> nop +0+00c0 <[^>]*> sltu at,a1,a0 +0+00c4 <[^>]*> bnezl at,000000c4 +[ ]*c4: R_MIPS_PC16 external_label +0+00c8 <[^>]*> nop ... diff --git a/gas/testsuite/gas/mips/bgeu.s b/gas/testsuite/gas/mips/bgeu.s index 8a5244c73a6..cccd584f780 100644 --- a/gas/testsuite/gas/mips/bgeu.s +++ b/gas/testsuite/gas/mips/bgeu.s @@ -23,10 +23,10 @@ text_label: bgtul $4,$5,text_label # Branch to an external label. -# bgeu $4,$5,external_label -# bgtu $4,$5,external_label -# bgeul $4,$5,external_label -# bgtul $4,$5,external_label + bgeu $4,$5,external_label + bgtu $4,$5,external_label + bgeul $4,$5,external_label + bgtul $4,$5,external_label # Round to a 16 byte boundary, for ease in testing multiple targets. nop diff --git a/gas/testsuite/gas/mips/blt.d b/gas/testsuite/gas/mips/blt.d index ca6d8b5e8ad..fdc7c4ba38e 100644 --- a/gas/testsuite/gas/mips/blt.d +++ b/gas/testsuite/gas/mips/blt.d @@ -51,20 +51,20 @@ Disassembly of section .text: 0+00a8 <[^>]*> slt at,a1,a0 0+00ac <[^>]*> beqzl at,0+0000 0+00b0 <[^>]*> nop -#0+00b4 <[^>]*> slt at,a0,a1 -#0+00b8 <[^>]*> bnez at,000000b8 -#[ ]*b8: R_MIPS_PC16 external_label -#0+00bc <[^>]*> nop -#0+00c0 <[^>]*> slt at,a1,a0 -#0+00c4 <[^>]*> beqz at,000000c4 -#[ ]*c4: R_MIPS_PC16 external_label -#0+00c8 <[^>]*> nop -#0+00cc <[^>]*> slt at,a0,a1 -#0+00d0 <[^>]*> bnezl at,000000d0 -#[ ]*d0: R_MIPS_PC16 external_label -#0+00d4 <[^>]*> nop -#0+00d8 <[^>]*> slt at,a1,a0 -#0+00dc <[^>]*> beqzl at,000000dc -#[ ]*dc: R_MIPS_PC16 external_label -#0+00e0 <[^>]*> nop +0+00b4 <[^>]*> slt at,a0,a1 +0+00b8 <[^>]*> bnez at,000000b8 +[ ]*b8: R_MIPS_PC16 external_label +0+00bc <[^>]*> nop +0+00c0 <[^>]*> slt at,a1,a0 +0+00c4 <[^>]*> beqz at,000000c4 +[ ]*c4: R_MIPS_PC16 external_label +0+00c8 <[^>]*> nop +0+00cc <[^>]*> slt at,a0,a1 +0+00d0 <[^>]*> bnezl at,000000d0 +[ ]*d0: R_MIPS_PC16 external_label +0+00d4 <[^>]*> nop +0+00d8 <[^>]*> slt at,a1,a0 +0+00dc <[^>]*> beqzl at,000000dc +[ ]*dc: R_MIPS_PC16 external_label +0+00e0 <[^>]*> nop ... diff --git a/gas/testsuite/gas/mips/blt.s b/gas/testsuite/gas/mips/blt.s index cdeff16d783..9b2ed08524f 100644 --- a/gas/testsuite/gas/mips/blt.s +++ b/gas/testsuite/gas/mips/blt.s @@ -25,10 +25,10 @@ text_label: blel $4,$5,text_label # Branch to an external label. -# blt $4,$5,external_label -# ble $4,$5,external_label -# bltl $4,$5,external_label -# blel $4,$5,external_label + blt $4,$5,external_label + ble $4,$5,external_label + bltl $4,$5,external_label + blel $4,$5,external_label # Round to a 16 byte boundary, for ease in testing multiple targets. nop diff --git a/gas/testsuite/gas/mips/bltu.d b/gas/testsuite/gas/mips/bltu.d index 5b147318f7c..f6fbfbb2aee 100644 --- a/gas/testsuite/gas/mips/bltu.d +++ b/gas/testsuite/gas/mips/bltu.d @@ -45,20 +45,20 @@ Disassembly of section .text: 0+0090 <[^>]*> sltu at,a1,a0 0+0094 <[^>]*> beqzl at,0+0000 0+0098 <[^>]*> nop -#0+009c <[^>]*> sltu at,a0,a1 -#0+00a0 <[^>]*> bnez at,000000a0 -#[ ]*a0: R_MIPS_PC16 external_label -#0+00a4 <[^>]*> nop -#0+00a8 <[^>]*> sltu at,a1,a0 -#0+00ac <[^>]*> beqz at,000000ac -#[ ]*ac: R_MIPS_PC16 external_label -#0+00b0 <[^>]*> nop -#0+00b4 <[^>]*> sltu at,a0,a1 -#0+00b8 <[^>]*> bnezl at,000000b8 -#[ ]*b8: R_MIPS_PC16 external_label -#0+00bc <[^>]*> nop -#0+00c0 <[^>]*> sltu at,a1,a0 -#0+00c4 <[^>]*> beqzl at,000000c4 -#[ ]*c4: R_MIPS_PC16 external_label -#0+00c8 <[^>]*> nop +0+009c <[^>]*> sltu at,a0,a1 +0+00a0 <[^>]*> bnez at,000000a0 +[ ]*a0: R_MIPS_PC16 external_label +0+00a4 <[^>]*> nop +0+00a8 <[^>]*> sltu at,a1,a0 +0+00ac <[^>]*> beqz at,000000ac +[ ]*ac: R_MIPS_PC16 external_label +0+00b0 <[^>]*> nop +0+00b4 <[^>]*> sltu at,a0,a1 +0+00b8 <[^>]*> bnezl at,000000b8 +[ ]*b8: R_MIPS_PC16 external_label +0+00bc <[^>]*> nop +0+00c0 <[^>]*> sltu at,a1,a0 +0+00c4 <[^>]*> beqzl at,000000c4 +[ ]*c4: R_MIPS_PC16 external_label +0+00c8 <[^>]*> nop ... diff --git a/gas/testsuite/gas/mips/bltu.s b/gas/testsuite/gas/mips/bltu.s index 88034e8bc0c..602b7b283d6 100644 --- a/gas/testsuite/gas/mips/bltu.s +++ b/gas/testsuite/gas/mips/bltu.s @@ -23,10 +23,10 @@ text_label: bleul $4,$5,text_label # Branch to an external label. -# bltu $4,$5,external_label -# bleu $4,$5,external_label -# bltul $4,$5,external_label -# bleul $4,$5,external_label + bltu $4,$5,external_label + bleu $4,$5,external_label + bltul $4,$5,external_label + bleul $4,$5,external_label # Round to a 16 byte boundary, for ease in testing multiple targets. nop diff --git a/gas/testsuite/gas/mips/branch-misc-2.d b/gas/testsuite/gas/mips/branch-misc-2.d new file mode 100644 index 00000000000..a9df3ab0dcf --- /dev/null +++ b/gas/testsuite/gas/mips/branch-misc-2.d @@ -0,0 +1,39 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: MIPS branch-misc-2 + +# Test the backward branches to globals symbols in current file. + +.*: +file format .*mips.* + +Disassembly of section .text: + \.\.\. + \.\.\. + \.\.\. +0+003c <[^>]*> 0411ffff bal 0000003c +[ ]*3c: R_MIPS_PC16 g1 +0+0040 <[^>]*> 00000000 nop +0+0044 <[^>]*> 0411ffff bal 00000044 +[ ]*44: R_MIPS_PC16 g2 +0+0048 <[^>]*> 00000000 nop +0+004c <[^>]*> 0411ffff bal 0000004c +[ ]*4c: R_MIPS_PC16 g3 +0+0050 <[^>]*> 00000000 nop +0+0054 <[^>]*> 0411ffff bal 00000054 +[ ]*54: R_MIPS_PC16 g4 +0+0058 <[^>]*> 00000000 nop +0+005c <[^>]*> 0411ffff bal 0000005c +[ ]*5c: R_MIPS_PC16 g5 +0+0060 <[^>]*> 00000000 nop +0+0064 <[^>]*> 0411ffff bal 00000064 +[ ]*64: R_MIPS_PC16 g6 +0+0068 <[^>]*> 00000000 nop + \.\.\. + \.\.\. + \.\.\. +0+00a8 <[^>]*> 1000ffff b 000000a8 +[ ]*a8: R_MIPS_PC16 x1 +0+00ac <[^>]*> 00000000 nop +0+00b0 <[^>]*> 1000ffff b 000000b0 +[ ]*b0: R_MIPS_PC16 x2 +0+00b4 <[^>]*> 00000000 nop + \.\.\. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index eaf7d37e1d5..91bb12dde85 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -407,7 +407,7 @@ if { [istarget mips*-*-*] } then { run_dump_test_arches "blt" [mips_arch_list_matching mips2] run_dump_test_arches "bltu" [mips_arch_list_matching mips2] run_dump_test_arches "branch-misc-1" [mips_arch_list_matching mips1] - run_list_test_arches "branch-misc-2" "" [mips_arch_list_matching mips1] + run_dump_test_arches "branch-misc-2" [mips_arch_list_matching mips1] if $ilocks { run_dump_test "div-ilocks"