From: Alex Deucher <alexdeucher@gmail.com>
Date: Fri, 7 Jan 2011 08:10:50 +0000 (-0500)
Subject: r600c: fix up SQ setup in blit code for Ontario/NI
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7c320a869b7c755e6cf3fc0bb37f4b0bd66ba3e0;p=mesa.git

r600c: fix up SQ setup in blit code for Ontario/NI
---

diff --git a/src/mesa/drivers/dri/r600/evergreen_blit.c b/src/mesa/drivers/dri/r600/evergreen_blit.c
index fc9fa9d22c7..e07da8c15b4 100644
--- a/src/mesa/drivers/dri/r600/evergreen_blit.c
+++ b/src/mesa/drivers/dri/r600/evergreen_blit.c
@@ -1406,9 +1406,95 @@ eg_set_default_state(context_t *context)
 	    num_hs_stack_entries = 85;
 	    num_ls_stack_entries = 85;
 	    break;
+    case CHIP_FAMILY_PALM:
+	    num_ps_gprs = 93;
+	    num_vs_gprs = 46;
+	    num_temp_gprs = 4;
+	    num_gs_gprs = 31;
+	    num_es_gprs = 31;
+	    num_hs_gprs = 23;
+	    num_ls_gprs = 23;
+	    num_ps_threads = 96;
+	    num_vs_threads = 16;
+	    num_gs_threads = 16;
+	    num_es_threads = 16;
+	    num_hs_threads = 16;
+	    num_ls_threads = 16;
+	    num_ps_stack_entries = 42;
+	    num_vs_stack_entries = 42;
+	    num_gs_stack_entries = 42;
+	    num_es_stack_entries = 42;
+	    num_hs_stack_entries = 42;
+	    num_ls_stack_entries = 42;
+	    break;
+    case CHIP_FAMILY_BARTS:
+	    num_ps_gprs = 93;
+	    num_vs_gprs = 46;
+	    num_temp_gprs = 4;
+	    num_gs_gprs = 31;
+	    num_es_gprs = 31;
+	    num_hs_gprs = 23;
+	    num_ls_gprs = 23;
+	    num_ps_threads = 128;
+	    num_vs_threads = 20;
+	    num_gs_threads = 20;
+	    num_es_threads = 20;
+	    num_hs_threads = 20;
+	    num_ls_threads = 20;
+	    num_ps_stack_entries = 85;
+	    num_vs_stack_entries = 85;
+	    num_gs_stack_entries = 85;
+	    num_es_stack_entries = 85;
+	    num_hs_stack_entries = 85;
+	    num_ls_stack_entries = 85;
+	    break;
+    case CHIP_FAMILY_TURKS:
+	    num_ps_gprs = 93;
+	    num_vs_gprs = 46;
+	    num_temp_gprs = 4;
+	    num_gs_gprs = 31;
+	    num_es_gprs = 31;
+	    num_hs_gprs = 23;
+	    num_ls_gprs = 23;
+	    num_ps_threads = 128;
+	    num_vs_threads = 20;
+	    num_gs_threads = 20;
+	    num_es_threads = 20;
+	    num_hs_threads = 20;
+	    num_ls_threads = 20;
+	    num_ps_stack_entries = 42;
+	    num_vs_stack_entries = 42;
+	    num_gs_stack_entries = 42;
+	    num_es_stack_entries = 42;
+	    num_hs_stack_entries = 42;
+	    num_ls_stack_entries = 42;
+	    break;
+    case CHIP_FAMILY_CAICOS:
+	    num_ps_gprs = 93;
+	    num_vs_gprs = 46;
+	    num_temp_gprs = 4;
+	    num_gs_gprs = 31;
+	    num_es_gprs = 31;
+	    num_hs_gprs = 23;
+	    num_ls_gprs = 23;
+	    num_ps_threads = 128;
+	    num_vs_threads = 10;
+	    num_gs_threads = 10;
+	    num_es_threads = 10;
+	    num_hs_threads = 10;
+	    num_ls_threads = 10;
+	    num_ps_stack_entries = 42;
+	    num_vs_stack_entries = 42;
+	    num_gs_stack_entries = 42;
+	    num_es_stack_entries = 42;
+	    num_hs_stack_entries = 42;
+	    num_ls_stack_entries = 42;
+	    break;
     }
 
-    if (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CEDAR)
+    if ((context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CEDAR) ||
+	(context->radeon.radeonScreen->chip_family == CHIP_FAMILY_PALM) ||
+	(context->radeon.radeonScreen->chip_family == CHIP_FAMILY_CAICOS))
 	    CLEARbit(sq_config, EG_SQ_CONFIG__VC_ENABLE_bit);
     else
 	    SETbit(sq_config, EG_SQ_CONFIG__VC_ENABLE_bit);