From: Tomeu Vizoso Date: Fri, 28 Jun 2019 07:17:55 +0000 (+0200) Subject: panfrost: Only tag AFBC addresses when sampling X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7c745f6148d92bcbf2d27598f00c586cf106ed01;p=mesa.git panfrost: Only tag AFBC addresses when sampling Rendering to AFBC was broken, as the HW will complaint loudly if we pass a tagged pointer in bifrost_render_target. Signed-off-by: Tomeu Vizoso Fixes: 3609b50a6443 ("panfrost: Merge AFBC slab with BO backing") Reviewed-by: Alyssa Rosenzweig --- diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c index 967d7116c24..be800ca6ce1 100644 --- a/src/gallium/drivers/panfrost/pan_context.c +++ b/src/gallium/drivers/panfrost/pan_context.c @@ -834,6 +834,11 @@ panfrost_upload_tex( unsigned first_layer = pview->u.tex.first_layer; unsigned last_layer = pview->u.tex.last_layer; + /* Lower-bit is set when sampling from colour AFBC */ + bool is_afbc = rsrc->bo->layout == PAN_AFBC; + bool is_zs = rsrc->base.bind & PIPE_BIND_DEPTH_STENCIL; + unsigned afbc_bit = (is_afbc && !is_zs) ? 1 : 0; + /* Inject the addresses in, interleaving mip levels, cube faces, and * strides in that order */ @@ -841,8 +846,9 @@ panfrost_upload_tex( for (unsigned l = first_level; l <= last_level; ++l) { for (unsigned f = first_layer; f <= last_layer; ++f) { + view->hw.payload[idx++] = - panfrost_get_texture_address(rsrc, l, f); + panfrost_get_texture_address(rsrc, l, f) + afbc_bit; if (has_manual_stride) { view->hw.payload[idx++] = diff --git a/src/gallium/drivers/panfrost/pan_resource.c b/src/gallium/drivers/panfrost/pan_resource.c index c5bda809320..8db7e45af1b 100644 --- a/src/gallium/drivers/panfrost/pan_resource.c +++ b/src/gallium/drivers/panfrost/pan_resource.c @@ -756,12 +756,7 @@ panfrost_get_texture_address( unsigned level_offset = rsrc->bo->slices[level].offset; unsigned face_offset = face * rsrc->bo->cubemap_stride; - /* Lower-bit is set when sampling from colour AFBC */ - bool is_afbc = rsrc->bo->layout == PAN_AFBC; - bool is_zs = rsrc->base.bind & PIPE_BIND_DEPTH_STENCIL; - unsigned afbc_bit = (is_afbc && !is_zs) ? 1 : 0; - - return rsrc->bo->gpu + level_offset + face_offset + afbc_bit; + return rsrc->bo->gpu + level_offset + face_offset; } static void