From: Marek Olšák Date: Thu, 23 May 2019 18:20:27 +0000 (-0400) Subject: radeonsi/gfx10: set the DCC constant encoding flag X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7c805a7c670ca588b5c5a17f7563131caf22e81b;p=mesa.git radeonsi/gfx10: set the DCC constant encoding flag Acked-by: Bas Nieuwenhuizen --- diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 91b474d4d8f..e25c65abda8 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1124,7 +1124,8 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws, sscreen->info.family == CHIP_RAVEN; sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 || sscreen->info.family == CHIP_RAVEN; - sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2; + sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2 || + sscreen->info.chip_class >= GFX10; /* Only enable primitive binning on APUs by default. */ sscreen->dpbb_allowed = sscreen->info.family == CHIP_RAVEN ||