From: Kenneth Graunke Date: Fri, 24 May 2013 16:28:56 +0000 (-0700) Subject: i965: Use the correct restart index for fixed index mode on Haswell. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7c87a3b5dac118697a9b67caa7b6d5cab60f316d;p=mesa.git i965: Use the correct restart index for fixed index mode on Haswell. The code that updates the ctx->Array._RestartIndex derived state mashed it to 0xFFFFFFFF when GL_PRIMITIVE_RESTART_FIXED_INDEX was enabled regardless of the index buffer type. It's supposed to be 0xFF for byte, 0xFFFF for short, or 0xFFFFFFFF for integer types. The new _mesa_primitive_restart_index() helper gets this right. The hardware appears to compare against the full 32-bit value some of the time, causing primitive restart not to occur when it should. The fact that it works some of the time is rather frightening. Fixes sporadic failures in the ES 3 instanced_arrays_primitive_restart conformance test when run in combination with other tests. NOTE: This is a candidate for the 9.1 branch. Signed-off-by: Kenneth Graunke Reviewed-by: Eric Anholt Reviewed-by: Ian Romanick --- diff --git a/src/mesa/drivers/dri/i965/brw_primitive_restart.c b/src/mesa/drivers/dri/i965/brw_primitive_restart.c index f82491529fa..85c5147c890 100644 --- a/src/mesa/drivers/dri/i965/brw_primitive_restart.c +++ b/src/mesa/drivers/dri/i965/brw_primitive_restart.c @@ -27,6 +27,7 @@ #include "main/imports.h" #include "main/bufferobj.h" +#include "main/varray.h" #include "brw_context.h" #include "brw_defines.h" @@ -186,16 +187,17 @@ haswell_upload_cut_index(struct brw_context *brw) const unsigned cut_index_setting = ctx->Array._PrimitiveRestart ? HSW_CUT_INDEX_ENABLE : 0; + /* BRW_NEW_INDEX_BUFFER */ BEGIN_BATCH(2); OUT_BATCH(_3DSTATE_VF << 16 | cut_index_setting | (2 - 2)); - OUT_BATCH(ctx->Array._RestartIndex); + OUT_BATCH(_mesa_primitive_restart_index(ctx, brw->ib.type)); ADVANCE_BATCH(); } const struct brw_tracked_state haswell_cut_index = { .dirty = { .mesa = _NEW_TRANSFORM, - .brw = 0, + .brw = BRW_NEW_INDEX_BUFFER, .cache = 0, }, .emit = haswell_upload_cut_index,