From: Gert Wollny Date: Sun, 12 Apr 2020 15:03:59 +0000 (+0200) Subject: r600/sfn: Move emission of barrier from compute shader to shader base X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7cbca9cf64840627afa3f1de588442c5c2d96028;p=mesa.git r600/sfn: Move emission of barrier from compute shader to shader base Tess shaders also use these barriers. Signed-off-by: Gert Wollny Part-of: --- diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_base.cpp b/src/gallium/drivers/r600/sfn/sfn_shader_base.cpp index 68777804664..b7f126c4def 100644 --- a/src/gallium/drivers/r600/sfn/sfn_shader_base.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_shader_base.cpp @@ -535,6 +535,10 @@ bool ShaderFromNirProcessor::emit_intrinsic_instruction(nir_intrinsic_instr* ins return emit_load_local_shared(instr); case nir_intrinsic_store_local_shared_r600: return emit_store_local_shared(instr); + case nir_intrinsic_control_barrier: + case nir_intrinsic_memory_barrier_tcs_patch: + return emit_barrier(instr); + default: fprintf(stderr, "r600-nir: Unsupported intrinsic %d\n", instr->intrinsic); return false; @@ -553,6 +557,15 @@ ShaderFromNirProcessor::emit_load_function_temp(UNUSED const nir_variable *var, return false; } +bool ShaderFromNirProcessor::emit_barrier(UNUSED nir_intrinsic_instr* instr) +{ + AluInstruction *ir = new AluInstruction(op0_group_barrier); + ir->set_flag(alu_last_instr); + emit_instruction(ir); + return true; +} + + bool ShaderFromNirProcessor::load_preloaded_value(const nir_dest& dest, int chan, PValue value, bool as_last) { if (!dest.is_ssa) { diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_base.h b/src/gallium/drivers/r600/sfn/sfn_shader_base.h index a7ea03e0fe0..45d7895d5e7 100644 --- a/src/gallium/drivers/r600/sfn/sfn_shader_base.h +++ b/src/gallium/drivers/r600/sfn/sfn_shader_base.h @@ -102,6 +102,7 @@ protected: bool emit_load_local_shared(nir_intrinsic_instr* instr); bool emit_store_local_shared(nir_intrinsic_instr* instr); + bool emit_barrier(nir_intrinsic_instr* instr); const GPRVector *output_register(unsigned location) const; bool load_preloaded_value(const nir_dest& dest, int chan, PValue value, diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_compute.cpp b/src/gallium/drivers/r600/sfn/sfn_shader_compute.cpp index 6f43533ad1f..e7499bfe465 100644 --- a/src/gallium/drivers/r600/sfn/sfn_shader_compute.cpp +++ b/src/gallium/drivers/r600/sfn/sfn_shader_compute.cpp @@ -70,8 +70,6 @@ bool ComputeShaderFromNir::emit_intrinsic_instruction_override(nir_intrinsic_ins return emit_load_3vec(instr, m_workgroup_id); case nir_intrinsic_load_num_work_groups: return emit_load_num_work_groups(instr); - case nir_intrinsic_control_barrier: - return emit_barrier(instr); default: return false; } @@ -89,14 +87,6 @@ bool ComputeShaderFromNir::emit_load_3vec(nir_intrinsic_instr* instr, return true; } -bool ComputeShaderFromNir::emit_barrier(UNUSED nir_intrinsic_instr* instr) -{ - AluInstruction *ir = new AluInstruction(op0_group_barrier); - ir->set_flag(alu_last_instr); - emit_instruction(ir); - return true; -} - bool ComputeShaderFromNir::emit_load_num_work_groups(nir_intrinsic_instr* instr) { int temp = allocate_temp_register(); diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_compute.h b/src/gallium/drivers/r600/sfn/sfn_shader_compute.h index db367760d2d..8c7a022c2a8 100644 --- a/src/gallium/drivers/r600/sfn/sfn_shader_compute.h +++ b/src/gallium/drivers/r600/sfn/sfn_shader_compute.h @@ -54,7 +54,6 @@ private: bool emit_load_3vec(nir_intrinsic_instr* instr, const std::array& src); bool emit_load_num_work_groups(nir_intrinsic_instr* instr); - bool emit_barrier(nir_intrinsic_instr* instr); int m_reserved_registers; std::array m_workgroup_id;