From: lkcl <lkcl@web>
Date: Thu, 26 May 2022 12:45:04 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2076
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7cdf864954327149ae6700a985ad57f125708d21;p=libreriscv.git

---

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index 1f4dc044a..8ff2322e4 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -45,9 +45,11 @@ in v3.0C and v3.1
 the progressive historic development of the Scalar parts of the Power ISA assumed
 that VSX would always be there to complement it. However With VMX/VSX 
 **not available** in the newly-introduced SFFS Compliancy Level, the
-existing non-VSX conversion/data-movement instructions require load/store
+existing non-VSX conversion/data-movement instructions require 
+a Vector of load/store
 instructions (slow and expensive) to transfer data between the FPRs and
-the GPRs.  For a 3D GPU this kills any modern competitive edge.
+the GPRs.  For a modern 3D GPU this kills any possibility of a
+competitive edge.
 Also, because SimpleV needs efficient scalar instructions in
 order to generate efficient vector instructions, adding new instructions
 for data-transfer/conversion between FPRs and GPRs multiplies the savings.