From: colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 Date: Sun, 6 Dec 2020 23:28:29 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~1492 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7d0f0b0c9fb104e70f28cd558f48bb4faa0f310c;p=libreriscv.git --- diff --git a/cole.mdwn b/cole.mdwn index 44d5bdafc..c2f1c258d 100644 --- a/cole.mdwn +++ b/cole.mdwn @@ -42,9 +42,6 @@ move things along from one stage to the next ## Completed but not yet submitted -- Coriolis2 tutorial - - EUR 500 - - DMI JTAG TAP needed - EUR 150 @@ -52,9 +49,14 @@ move things along from one stage to the next submitted but not confirmed paid: +# MOU coriolis2 2019-10-029, submitted on 2020-DEC-06 + +- Coriolis2 tutorial + - EUR 500 + ## Paid -# wishbone 2019-10-043 1-OCT-2020 +# MOU wishbone 2019-10-043, recieved payment on 2020-OCT-01 - Convert 180nm Test ASIC Mem Layout diagram to SVG - EUR 150 @@ -71,7 +73,7 @@ submitted but not confirmed paid: - Virtual Regfile port - EUR 200. shared, lkcl (50%, EUR 100), cole (50%, EUR 100) -# coriolis2 2019-10-029 1-OCT-2020 +# MOU coriolis2 2019-10-029, recieved payment on 2020-OCT-01 - Coriolis2 documentation and setup scripts, (documentation budget, EUR 200) -