From: Richard Sandiford Date: Fri, 8 May 2015 14:04:12 +0000 (+0000) Subject: Franz Sirl X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7d54bea5b99b69b78efe81028098b78d9a52f815;p=gcc.git Franz Sirl gcc/ 2015-05-08 Richard Sandiford Franz Sirl * config/i386/i386.md (_ldx, *_ldx): Remove mode from (set ...). * config/rx/rx.md (movdi, movdf): Likewise. Likewise for define_peephole2s. Co-Authored-By: Franz Sirl From-SVN: r222911 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6f4558fad8a..e85dc316d12 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2015-05-08 Richard Sandiford + Franz Sirl + + * config/i386/i386.md (_ldx, *_ldx): Remove mode + from (set ...). + * config/rx/rx.md (movdi, movdf): Likewise. + Likewise for define_peephole2s. + 2015-05-08 Alan Lawrence * config/aarch64/arm_neon.h (vceq_s64, vceq_u64, vceqz_s64, vceqz_u64, diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 938f3985493..0959aef7a0d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -18879,13 +18879,13 @@ [(set_attr "type" "mpxchk")]) (define_expand "_ldx" - [(parallel [(set:BND (match_operand:BND 0 "register_operand") - (unspec:BND - [(mem: - (match_par_dup 3 - [(match_operand: 1 "address_mpx_no_index_operand") - (match_operand: 2 "register_operand")]))] - UNSPEC_BNDLDX)) + [(parallel [(set (match_operand:BND 0 "register_operand") + (unspec:BND + [(mem: + (match_par_dup 3 + [(match_operand: 1 "address_mpx_no_index_operand") + (match_operand: 2 "register_operand")]))] + UNSPEC_BNDLDX)) (use (mem:BLK (match_dup 1)))])] "TARGET_MPX" { @@ -18909,14 +18909,14 @@ }) (define_insn "*_ldx" - [(parallel [(set:BND (match_operand:BND 0 "register_operand" "=w") - (unspec:BND - [(match_operator: 3 "bnd_mem_operator" - [(unspec: - [(match_operand: 1 "address_mpx_no_index_operand" "Ti") - (match_operand: 2 "register_operand" "l")] - UNSPEC_BNDLDX_ADDR)])] - UNSPEC_BNDLDX)) + [(parallel [(set (match_operand:BND 0 "register_operand" "=w") + (unspec:BND + [(match_operator: 3 "bnd_mem_operator" + [(unspec: + [(match_operand: 1 "address_mpx_no_index_operand" "Ti") + (match_operand: 2 "register_operand" "l")] + UNSPEC_BNDLDX_ADDR)])] + UNSPEC_BNDLDX)) (use (mem:BLK (match_dup 1)))])] "TARGET_MPX" "bndldx\t{%3, %0|%0, %3}" diff --git a/gcc/config/rx/rx.md b/gcc/config/rx/rx.md index 9cb0451bda9..8b124759b0b 100644 --- a/gcc/config/rx/rx.md +++ b/gcc/config/rx/rx.md @@ -1734,9 +1734,9 @@ (match_dup 2))) (clobber (reg:CC CC_REG))])] "peep2_regno_dead_p (2, REGNO (operands[0])) && (optimize < 3 || optimize_size)" - [(parallel [(set:SI (match_dup 2) - (memex_commutative:SI (match_dup 2) - (extend_types:SI (match_dup 1)))) + [(parallel [(set (match_dup 2) + (memex_commutative:SI (match_dup 2) + (extend_types:SI (match_dup 1)))) (clobber (reg:CC CC_REG))])] ) @@ -1748,9 +1748,9 @@ (match_dup 0))) (clobber (reg:CC CC_REG))])] "peep2_regno_dead_p (2, REGNO (operands[0])) && (optimize < 3 || optimize_size)" - [(parallel [(set:SI (match_dup 2) - (memex_commutative:SI (match_dup 2) - (extend_types:SI (match_dup 1)))) + [(parallel [(set (match_dup 2) + (memex_commutative:SI (match_dup 2) + (extend_types:SI (match_dup 1)))) (clobber (reg:CC CC_REG))])] ) @@ -1762,9 +1762,9 @@ (match_dup 0))) (clobber (reg:CC CC_REG))])] "peep2_regno_dead_p (2, REGNO (operands[0])) && (optimize < 3 || optimize_size)" - [(parallel [(set:SI (match_dup 2) - (memex_noncomm:SI (match_dup 2) - (extend_types:SI (match_dup 1)))) + [(parallel [(set (match_dup 2) + (memex_noncomm:SI (match_dup 2) + (extend_types:SI (match_dup 1)))) (clobber (reg:CC CC_REG))])] ) @@ -1775,9 +1775,9 @@ (memex_nocc:SI (match_dup 0) (match_dup 2)))] "peep2_regno_dead_p (2, REGNO (operands[0])) && (optimize < 3 || optimize_size)" - [(set:SI (match_dup 2) - (memex_nocc:SI (match_dup 2) - (extend_types:SI (match_dup 1))))] + [(set (match_dup 2) + (memex_nocc:SI (match_dup 2) + (extend_types:SI (match_dup 1))))] ) (define_peephole2 @@ -1787,9 +1787,9 @@ (memex_nocc:SI (match_dup 2) (match_dup 0)))] "peep2_regno_dead_p (2, REGNO (operands[0])) && (optimize < 3 || optimize_size)" - [(set:SI (match_dup 2) - (memex_nocc:SI (match_dup 2) - (extend_types:SI (match_dup 1))))] + [(set (match_dup 2) + (memex_nocc:SI (match_dup 2) + (extend_types:SI (match_dup 1))))] ) (define_insn "si3_" @@ -2623,8 +2623,8 @@ ) (define_insn "movdi" - [(set:DI (match_operand:DI 0 "nonimmediate_operand" "=rm") - (match_operand:DI 1 "general_operand" "rmi"))] + [(set (match_operand:DI 0 "nonimmediate_operand" "=rm") + (match_operand:DI 1 "general_operand" "rmi"))] "TARGET_ENABLE_LRA" { return rx_gen_move_template (operands, false); } [(set_attr "length" "16") @@ -2632,8 +2632,8 @@ ) (define_insn "movdf" - [(set:DF (match_operand:DF 0 "nonimmediate_operand" "=rm") - (match_operand:DF 1 "general_operand" "rmi"))] + [(set (match_operand:DF 0 "nonimmediate_operand" "=rm") + (match_operand:DF 1 "general_operand" "rmi"))] "TARGET_ENABLE_LRA" { return rx_gen_move_template (operands, false); } [(set_attr "length" "16")