From: lkcl <lkcl@web>
Date: Wed, 30 Dec 2020 15:47:54 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~721
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7d8a27b572823ca8e9f8833a87dc56063a3e04cd;p=libreriscv.git

---

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 44375c3a9..409966721 100644
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -167,6 +167,11 @@ The following fields are common to all Remapped Encodings:
 
 Bits 9 to 18 are further decoded depending on RM category for the instruction.
 
+* MODE changes the behaviour of the SV operation (result saturation, mapreduce)
+* SUBVL groups elements together into vec2, vec3, vec4 for use in 3D and Audio/Video DSP work
+* ELWIDTH overrides the instruction's operand width
+* MASK and MASK_KIND provide predication (two types of sources: scalar INT and Vector CR).
+
 # Mode
 
 Mode is an augmentation of SV behaviour.  Some of these alterations are element-based (saturation), others involve post-analysis (predicate result) and others are Vector-based (mapreduce, fail-on-first).