From: Yao Qi <yao@codesourcery.com>
Date: Mon, 20 Dec 2010 06:15:01 +0000 (+0000)
Subject: Forget to commit in my last check in
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=7d8cb6628195812390787f33162a677f13272dec;p=binutils-gdb.git

Forget to commit in my last check in
2010-12-20  Yao Qi  <yao@codesourcery.com>

	* features/arm-core.xml:  Add attribute type to reg from r0 to r12.
	* features/arm-with-iwmmxt.c: Regenerate.
	* features/arm-with-neon.c: Regenerate.
	* features/arm-with-vfpv2.c: Regenerate.
	* features/arm-with-vfpv3.c: Regenerate.
---

diff --git a/gdb/features/arm-core.xml b/gdb/features/arm-core.xml
index 16249011c9d..59e59e96c6b 100644
--- a/gdb/features/arm-core.xml
+++ b/gdb/features/arm-core.xml
@@ -7,19 +7,19 @@
 
 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
 <feature name="org.gnu.gdb.arm.core">
-  <reg name="r0" bitsize="32"/>
-  <reg name="r1" bitsize="32"/>
-  <reg name="r2" bitsize="32"/>
-  <reg name="r3" bitsize="32"/>
-  <reg name="r4" bitsize="32"/>
-  <reg name="r5" bitsize="32"/>
-  <reg name="r6" bitsize="32"/>
-  <reg name="r7" bitsize="32"/>
-  <reg name="r8" bitsize="32"/>
-  <reg name="r9" bitsize="32"/>
-  <reg name="r10" bitsize="32"/>
-  <reg name="r11" bitsize="32"/>
-  <reg name="r12" bitsize="32"/>
+  <reg name="r0" bitsize="32" type="uint32"/>
+  <reg name="r1" bitsize="32" type="uint32"/>
+  <reg name="r2" bitsize="32" type="uint32"/>
+  <reg name="r3" bitsize="32" type="uint32"/>
+  <reg name="r4" bitsize="32" type="uint32"/>
+  <reg name="r5" bitsize="32" type="uint32"/>
+  <reg name="r6" bitsize="32" type="uint32"/>
+  <reg name="r7" bitsize="32" type="uint32"/>
+  <reg name="r8" bitsize="32" type="uint32"/>
+  <reg name="r9" bitsize="32" type="uint32"/>
+  <reg name="r10" bitsize="32" type="uint32"/>
+  <reg name="r11" bitsize="32" type="uint32"/>
+  <reg name="r12" bitsize="32" type="uint32"/>
   <reg name="sp" bitsize="32" type="data_ptr"/>
   <reg name="lr" bitsize="32"/>
   <reg name="pc" bitsize="32" type="code_ptr"/>